[coreboot-gerrit] New patch to review for coreboot: 2b9cf02 Intel 5000: udelay.c: Remove redundant `tsc = rdtsc(); `

Paul Menzel (paulepanter@users.sourceforge.net) gerrit at coreboot.org
Sun May 12 00:32:32 CEST 2013


Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3241

-gerrit

commit 2b9cf02a379f63c9b180073fcc8058a0e523fe99
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date:   Wed May 8 17:08:55 2013 +0200

    Intel 5000: udelay.c: Remove redundant `tsc = rdtsc();`
    
    Remove the `tsc = rdtsc();` line which is in the do-while-loop
    already.
    
    The `udelay.c` files of the northbridges i945 and Sandy Bridge
    do not have that line either.
    
    Change-Id: I5cff424110d2d6cd6a26b63e59c03c61da8af7b3
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
 src/northbridge/intel/i5000/udelay.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/northbridge/intel/i5000/udelay.c b/src/northbridge/intel/i5000/udelay.c
index caee73f..3768e16 100644
--- a/src/northbridge/intel/i5000/udelay.c
+++ b/src/northbridge/intel/i5000/udelay.c
@@ -87,8 +87,6 @@ void udelay(u32 us)
 	tsc1.lo = dword;
 	tsc1.hi += tscd.hi;
 
-	tsc = rdtsc();
-
 	do {
 		tsc = rdtsc();
 	} while ((tsc.hi < tsc1.hi)



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