[coreboot-gerrit] Patch merged into coreboot/master: 8c8af59 AMD Brazos/Trinity boards: PlatformGnbPcie.c: Reserve correct amount of memory

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 8c8af592ca20e6c2dc48bea2c3ae66aa92c9dca7
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date:   Fri May 10 09:23:42 2013 +0200

    AMD Brazos/Trinity boards: PlatformGnbPcie.c: Reserve correct amount of memory
    
    In `PlatformGnbPcie.c` AGESA functions are used to reserve memory
    space to save the PCIe configuration to. This is the
    
    With the following definitions in `AGESA.h`
    
        $ more src/vendorcode/amd/agesa/f14/AGESA.h
        […]
        /// PCIe port descriptor
        typedef struct {
          IN       UINT32               Flags;                    /**< Descriptor flags
                                                                   * @li @b Bit31 - last descriptor in complex
                                                                   */
          IN       PCIe_ENGINE_DATA     EngineData;               ///< Engine data
          IN       PCIe_PORT_DATA       Port;                     ///< PCIe port specific configuration info
        } PCIe_PORT_DESCRIPTOR;
    
        /// DDI descriptor
        typedef struct {
          IN       UINT32               Flags;                    /**< Descriptor flags
                                                                   * @li @b Bit31 - last descriptor in complex
                                                                   */
          IN       PCIe_ENGINE_DATA     EngineData;               ///< Engine data
          IN       PCIe_DDI_DATA        Ddi;                      ///< DDI port specific configuration info
        } PCIe_DDI_DESCRIPTOR;
    
        /// PCIe Complex descriptor
        typedef struct {
          IN       UINT32               Flags;                    /**< Descriptor flags
                                                                   * @li @b Bit31 - last descriptor in topology
                                                                   */
          IN       UINT32               SocketId;                 ///< Socket Id
          IN       PCIe_PORT_DESCRIPTOR *PciePortList;            ///< Pointer to array of PCIe port descriptors or NULL (Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST).
          IN       PCIe_DDI_DESCRIPTOR  *DdiLinkList;             ///< Pointer to array DDI link descriptors (Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST).
          IN       VOID                 *Reserved;                ///< Reserved for future use
        } PCIe_COMPLEX_DESCRIPTOR;
        […]
    
    memory has to be reserved for the `PCIe_COMPLEX_DESCRIPTOR` and,
    as two struct members are pointers to arrays with elements of type
    `PCIe_PORT_DESCRIPTOR` and `PCIe_DDI_DESCRIPTOR`, space for these
    times the number of array elements have to be reserved:
    a + b * 5 + c * 2.
    
          sizeof(PCIe_COMPLEX_DESCRIPTOR)
        + sizeof(PCIe_PORT_DESCRIPTOR) * 5
        + sizeof(PCIe_DDI_DESCRIPTOR) * 2;
    
    But for whatever reason parentheses were put in there making this
    calculation incorrect and reserving too much memory.
    
        (a + b * 5 + c) * 2
    
    So, remove the parentheses to reserve the exact amount of memory
    needed.
    
    The ASRock E350M1 still boots with these changes. No changes were
    observed as expected.
    
    Rudolf Marek made this change as part of his patch »ASUS F2A85-M:
    Correct and clean up PCIe config« [1]. Factor this hunk out as it
    affects all AMD Brazos and Trinity based boards.
    
    [1] http://review.coreboot.org/#/c/3194/
    
    Change-Id: I32e8c8a3dfc5e87eb119eb17719d612e57e0817a
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-on: http://review.coreboot.org/3239
    Tested-by: build bot (Jenkins)
    Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>
    Reviewed-by: Jens Rottmann <JRottmann at LiPPERTembedded.de>
    Reviewed-by: Bruce Griffith <Bruce.Griffith at se-eng.com>


See http://review.coreboot.org/3239 for details.

-gerrit