[coreboot-gerrit] Patch set updated for coreboot: e94d77c beaglebone: initial Kconfig and Makefiles
David Hendricks (dhendrix@chromium.org)
gerrit at coreboot.org
Fri May 24 18:30:16 CEST 2013
David Hendricks (dhendrix at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3279
-gerrit
commit e94d77c76c8144de034fb9180b4119a6b1d57e8a
Author: David Hendricks <dhendrix at chromium.org>
Date: Fri May 24 06:48:42 2013 -0700
beaglebone: initial Kconfig and Makefiles
Initial structure of Beaglebone port
Change-Id: Ia255ab207f424dcd525990cdc0d74953e012c087
Signed-off-by: David Hendricks <dhendrix at chromium.org>
---
src/cpu/Kconfig | 1 +
src/cpu/Makefile.inc | 1 +
src/cpu/ti/Kconfig | 11 +++
src/cpu/ti/Makefile.inc | 1 +
src/cpu/ti/am335x/Kconfig | 78 ++++++++++++++++
src/cpu/ti/am335x/Makefile.inc | 1 +
src/mainboard/Kconfig | 3 +
src/mainboard/ti/Kconfig | 37 ++++++++
src/mainboard/ti/beaglebone/Kconfig | 148 +++++++++++++++++++++++++++++++
src/mainboard/ti/beaglebone/Makefile.inc | 22 +++++
10 files changed, 303 insertions(+)
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index ed7d6ab..dd28cb7 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -5,6 +5,7 @@ if ARCH_ARMV7
source src/cpu/armltd/Kconfig
source src/cpu/samsung/Kconfig
+source src/cpu/ti/Kconfig
endif # ARCH_ARM
diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc
index 8d93756..25ef424 100644
--- a/src/cpu/Makefile.inc
+++ b/src/cpu/Makefile.inc
@@ -5,6 +5,7 @@ subdirs-y += amd
subdirs-y += armltd
subdirs-y += intel
subdirs-y += samsung
+subdirs-y += ti
subdirs-y += via
subdirs-y += x86
diff --git a/src/cpu/ti/Kconfig b/src/cpu/ti/Kconfig
new file mode 100644
index 0000000..c82c290
--- /dev/null
+++ b/src/cpu/ti/Kconfig
@@ -0,0 +1,11 @@
+config CPU_TI_AM335X
+ depends on ARCH_ARMV7
+ select HAVE_MONOTONIC_TIMER
+ select HAVE_UART_SPECIAL
+ select DEFAULT_EARLY_CONSOLE
+ bool
+ default n
+
+if CPU_TI_AM335X
+source src/cpu/ti/am335x/Kconfig
+endif
diff --git a/src/cpu/ti/Makefile.inc b/src/cpu/ti/Makefile.inc
new file mode 100644
index 0000000..64b22f6
--- /dev/null
+++ b/src/cpu/ti/Makefile.inc
@@ -0,0 +1 @@
+subdirs-$(CONFIG_CPU_TI_AM335X) += am335x
diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig
new file mode 100644
index 0000000..15cb0c2
--- /dev/null
+++ b/src/cpu/ti/am335x/Kconfig
@@ -0,0 +1,78 @@
+config BOOTBLOCK_CPU_INIT
+ string
+ default "cpu/ti/am335x/bootblock.c"
+ help
+ CPU/SoC-specific bootblock code. This is useful if the
+ bootblock must load microcode or copy data from ROM before
+ searching for the bootblock.
+
+# Example SRAM/iRAM map for Exynos5250 platform:
+#
+# 0x0202_3400: bootblock, assume up to 32KB in size
+# 0x0203_0000: romstage, assume up to 128KB in size.
+# 0x0207_8000: stack pointer
+
+#FIXME: find out where romboot places ml0/coreboot
+config BOOTBLOCK_BASE
+ hex
+ default 0xdeadbeef
+
+#config ROMSTAGE_BASE
+# hex
+# default 0x02030000
+#
+#config ROMSTAGE_SIZE
+# hex
+# default 0x10000
+
+# Stack may reside in either IRAM or DRAM. We will define it to live
+# at the top of IRAM for now.
+#
+# Stack grows downward, push operation stores register contents in
+# consecutive memory locations ending just below SP
+config STACK_TOP
+ hex
+ default 0x02078000
+
+config STACK_BOTTOM
+ hex
+ default 0x02077000
+
+config STACK_SIZE
+ hex
+ default 0x1000
+
+#config CBFS_ROM_OFFSET
+# # Calculated by BL1 + max bootblock size.
+# hex "offset of CBFS data in ROM"
+# default 0x0A000
+#
+## TODO Change this to some better address not overlapping bootblock when
+## cbfstool supports creating header in arbitrary location.
+#config CBFS_HEADER_ROM_OFFSET
+# hex "offset of master CBFS header in ROM"
+# default 0x2040
+#
+## TODO We may probably move this to board-specific implementation files instead
+## of KConfig values.
+#config CBFS_CACHE_ADDRESS
+# hex "memory address to put CBFS cache data"
+# default 0x02060000
+#
+#config CBFS_CACHE_SIZE
+# hex "size of CBFS cache data"
+# default 0x000017000
+
+# FIXME: other magic numbers that should probably go away
+config XIP_ROM_SIZE
+ hex
+ default ROMSTAGE_SIZE
+
+config SYS_SDRAM_BASE
+ hex
+ default 0x40000000
+
+# FIXME: this can probably be smaller
+config COREBOOT_TABLES_SIZE
+ hex
+ default 0x800
diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc
new file mode 100644
index 0000000..e3a1da4
--- /dev/null
+++ b/src/cpu/ti/am335x/Makefile.inc
@@ -0,0 +1 @@
+bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c
diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig
index 3ca21ff..1e5d4bd 100644
--- a/src/mainboard/Kconfig
+++ b/src/mainboard/Kconfig
@@ -120,6 +120,8 @@ config VENDOR_TECHNOLOGIC
bool "Technologic"
config VENDOR_TELEVIDEO
bool "TeleVideo"
+config VENDOR_TI
+ bool "TI"
config VENDOR_THOMSON
bool "Thomson"
config VENDOR_TRAVERSE
@@ -194,6 +196,7 @@ source "src/mainboard/technexion/Kconfig"
source "src/mainboard/technologic/Kconfig"
source "src/mainboard/televideo/Kconfig"
source "src/mainboard/thomson/Kconfig"
+source "src/mainboard/ti/Kconfig"
source "src/mainboard/traverse/Kconfig"
source "src/mainboard/tyan/Kconfig"
source "src/mainboard/via/Kconfig"
diff --git a/src/mainboard/ti/Kconfig b/src/mainboard/ti/Kconfig
new file mode 100644
index 0000000..c4cd8c3
--- /dev/null
+++ b/src/mainboard/ti/Kconfig
@@ -0,0 +1,37 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2013 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+if VENDOR_TI
+
+# Auto select common options
+choice
+ prompt "Mainboard model"
+
+config BOARD_TI_BEAGLEBONE
+ bool "Beaglebone"
+
+endchoice
+
+source "src/mainboard/ti/beaglebone/Kconfig"
+
+config MAINBOARD_VENDOR
+ string
+ default "TI"
+
+endif # VENDOR_TI
diff --git a/src/mainboard/ti/beaglebone/Kconfig b/src/mainboard/ti/beaglebone/Kconfig
new file mode 100644
index 0000000..02c12e1
--- /dev/null
+++ b/src/mainboard/ti/beaglebone/Kconfig
@@ -0,0 +1,148 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2013 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+if BOARD_TI_BEAGLEBONE
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select ARCH_ARMV7
+ select CPU_TI_AM335X
+ select HAVE_UART_MEMORY_MAPPED
+ # FIXME: This should be much smaller
+ select BOARD_ROMSIZE_KB_128
+ select DRIVER_TI_TPS65090
+
+config MAINBOARD_DIR
+ string
+ default ti/beaglebone
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "Beaglebone"
+
+config MAX_CPUS
+ int
+ default 1
+
+config MAINBOARD_VENDOR
+ string
+ default "TI"
+
+config BOOTBLOCK_MAINBOARD_INIT
+ string
+ default "mainboard/ti/am335x/bootblock.c"
+
+config DRAM_SIZE_MB
+ int
+ default 256
+
+config NR_DRAM_BANKS
+ int
+ default 1
+
+# FIXME: the choice thingie is screwed up.
+#choice CONSOLE_SERIAL_UART_CHOICES
+# prompt "Serial Console UART"
+# default CONSOLE_SERIAL_UART0
+# depends on CONSOLE_SERIAL_UART
+#
+#config CONSOLE_SERIAL_UART0
+# bool "UART0"
+# help
+# Serial console on UART0
+#
+#config CONSOLE_SERIAL_UART1
+# bool "UART1"
+# help
+# Serial console on UART1
+#
+#config CONSOLE_SERIAL_UART2
+# bool "UART2"
+# help
+# Serial console on UART2
+#
+#config CONSOLE_SERIAL_UART3
+# bool "UART3"
+# help
+# Serial console on UART3
+#
+#endchoice
+#
+##FIXME: figure out the correct MMIO addresses for UARTs
+#config CONSOLE_SERIAL_UART_ADDRESS
+# hex
+# depends on CONSOLE_SERIAL_UART
+# default 0x12c00000 if CONSOLE_SERIAL_UART0
+# default 0x12c10000 if CONSOLE_SERIAL_UART1
+# default 0x12c20000 if CONSOLE_SERIAL_UART2
+# default 0x12c30000 if CONSOLE_SERIAL_UART3
+# help
+# Map the UART names to the respective MMIO address.
+
+config SERIAL_UART_ADDRESS
+ hex
+ default 0x44e09000
+
+#################################################################
+# stuff from smdk5250.h #
+# FIXME: can we move some of these to exynos5250's Kconfig? #
+#################################################################
+config SYS_I2C_SPEED
+ int
+ default 100000
+
+config I2C_MULTI_BUS
+ bool
+ default y
+
+#FIXME: get proper voltages
+
+config VDD_ARM_MV
+ int
+ default 1300 #1.3V
+
+config VDD_INT_UV
+ int
+ default 1012500 # 1.0125v
+
+config VDD_MIF_MV
+ int
+ default 1000 # 1.0v
+
+config VDD_G3D_MV
+ int
+ default 1200 # 1.2v
+
+config VDD_LDO2_MV
+ int
+ default 1500 # 1.5v
+
+config VDD_LDO3_MV
+ int
+ default 1800 # 1.8v
+
+config VDD_LDO5_MV
+ int
+ default 1800 # 1.8v
+
+config VDD_LDO10_MV
+ int
+ default 1800 # 1.8v
+
+endif # BOARD_TI_BEAGLEBONE
diff --git a/src/mainboard/ti/beaglebone/Makefile.inc b/src/mainboard/ti/beaglebone/Makefile.inc
new file mode 100644
index 0000000..47cef95
--- /dev/null
+++ b/src/mainboard/ti/beaglebone/Makefile.inc
@@ -0,0 +1,22 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+#romstage-y += romstage.c
+
+#ramstage-y += ramstage.c
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