[coreboot-gerrit] New patch to review for coreboot: f70d835 WIP: kontron/it8516e: ACPI code drop

Nico Huber (nico.huber@secunet.com) gerrit at coreboot.org
Sat May 25 22:02:43 CEST 2013


Nico Huber (nico.huber at secunet.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3287

-gerrit

commit f70d835a9561a4812b32fa2299a282b7f8a1ac7d
Author: Nico Huber <nico.huber at secunet.com>
Date:   Thu May 23 18:14:36 2013 +0200

    WIP: kontron/it8516e: ACPI code drop
    
    An example how the ACPI framework can be used.
    
    Change-Id: Ifd6765821d9873112ebaae1af28a9dec97c3146e
    Signed-off-by: Nico Huber <nico.huber at secunet.com>
---
 src/ec/kontron/it8516e/acpi/ec.asl          | 115 ++++++++++++++++++++++++++++
 src/ec/kontron/it8516e/acpi/pm_channels.asl | 115 ++++++++++++++++++++++++++++
 2 files changed, 230 insertions(+)

diff --git a/src/ec/kontron/it8516e/acpi/ec.asl b/src/ec/kontron/it8516e/acpi/ec.asl
new file mode 100644
index 0000000..bdae967
--- /dev/null
+++ b/src/ec/kontron/it8516e/acpi/ec.asl
@@ -0,0 +1,115 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 secunet Security Networks AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/*
+ * Include this file into a mainboard's DSDT _SB device tree and it will
+ * expose the IT8516E in the configuration used by Kontron:
+ *   2xUART,
+ *   PS/2 Mouse, Keyboard
+ *   Two PM Channels
+ *
+ * It allows the change of IO ports, IRQs and DMA settings on the devices
+ * and disabling and reenabling logical devices.
+ *
+ * Controlled by the following preprocessor defines:
+ * IT8516E_EC_DEV	Device identifier for this EC (e.g. EC0)
+ * SUPERIO_PNP_BASE	I/o address of the first PnP configuration register
+ * IT8516E_FIRST_DATA	I/o address of the EC_DATA register on the first
+ *			pm channel
+ * IT8516E_FIRST_SC	I/o address of the EC_SC register on the first
+ *			pm channel
+ * IT8516E_SECOND_DATA	I/o address of the EC_DATA register on the second
+ *			pm channel
+ * IT8516E_SECOND_SC	I/o address of the EC_SC register on the second
+ *			pm channel
+ */
+
+#undef SUPERIO_CHIP_NAME
+#define SUPERIO_CHIP_NAME IT8516E
+#include <superio/acpi/pnp.asl>
+
+Device(IT8516E_EC_DEV) {
+	Name (_HID, EisaId("PNP0A05"))
+	Name (_STR, Unicode("Kontron IT8516E Embedded Controller"))
+	Name (_UID, SUPERIO_UID(IT8516E_EC_DEV,))
+
+	/* SuperIO configuration ports */
+	OperationRegion (CREG, SystemIO, SUPERIO_PNP_BASE, 0x02)
+	Field (CREG, ByteAcc, NoLock, Preserve)
+	{
+		ADDR,   8,
+		DATA,   8
+	}
+	IndexField (ADDR, DATA, ByteAcc, NoLock, Preserve)
+	{
+		Offset (0x07),
+		PNP_LOGICAL_DEVICE,	8, /* Logical device selector */
+
+		Offset (0x30),
+		PNP_DEVICE_ACTIVE,	1, /* Logical device activation */
+
+		Offset (0x60),
+		PNP_IO0_HIGH_BYTE,	8, /* First I/O port base - high byte */
+		PNP_IO0_LOW_BYTE,	8, /* First I/O port base - low byte */
+		PNP_IO1_HIGH_BYTE,	8, /* Second I/O port base - high byte */
+		PNP_IO1_LOW_BYTE,	8, /* Second I/O port base - low byte */
+
+		Offset (0x70),
+		PNP_IRQ0,		8, /* First IRQ */
+	}
+
+	Method (_CRS)
+	{
+		/* Announce the used i/o ports to the OS */
+		Return (ResourceTemplate () {
+			IO (Decode16, SUPERIO_PNP_BASE, SUPERIO_PNP_BASE, 0x01, 0x02)
+		})
+	}
+
+	#undef PNP_ENTER_MAGIC_1ST
+	#undef PNP_ENTER_MAGIC_2ND
+	#undef PNP_ENTER_MAGIC_3RD
+	#undef PNP_EXIT_MAGIC_1ST
+	#include <superio/acpi/pnp_config.asl>
+
+	Method (_PSC)
+	{
+		/* No PM: always in C0 */
+		Return (0)
+	}
+
+	#undef SUPERIO_UART_LDN
+	#undef SUPERIO_UART_DDN
+	#undef SUPERIO_UART_PM_REG
+	#define SUPERIO_UART_LDN 1
+	#include <superio/acpi/pnp_uart.asl>
+
+	#undef SUPERIO_UART_LDN
+	#define SUPERIO_UART_LDN 2
+	#include <superio/acpi/pnp_uart.asl>
+
+	#undef SUPERIO_KBC_LDN
+	#undef SUPERIO_KBC_PS2M
+	#undef SUPERIO_KBC_PS2LDN
+	#define SUPERIO_KBC_LDN 6
+	#define SUPERIO_KBC_PS2LDN 5
+	#include <superio/acpi/pnp_kbc.asl>
+
+	#include "pm_channels.asl"
+}
diff --git a/src/ec/kontron/it8516e/acpi/pm_channels.asl b/src/ec/kontron/it8516e/acpi/pm_channels.asl
new file mode 100644
index 0000000..f18ac36
--- /dev/null
+++ b/src/ec/kontron/it8516e/acpi/pm_channels.asl
@@ -0,0 +1,115 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 secunet Security Networks AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifdef IT8516E_FIRST_DATA
+Device (PM1) {
+	Name (_HID, EisaId("PNP0C02"))
+	Name (_STR, Unicode("IT8516E PM Channel 1"))
+	Name (_UID, SUPERIO_UID(PM, 1))
+
+	/*
+	 * The EC firmware exposes CPU temperature through ec ram
+	 * on the first PM channel.
+	 */
+
+	#undef EC_DATA_IO
+	#define EC_DATA_IO IT8516E_FIRST_DATA
+	#undef EC_SC_IO
+	#define EC_SC_IO IT8516E_FIRST_SC
+	#include <ec/acpi/ec.asl>
+
+	Method (_CRS)
+	{
+		/* Announce the used i/o ports to the OS */
+		Return (ResourceTemplate () {
+			IO (Decode16, IT8516E_FIRST_DATA, IT8516E_FIRST_DATA, 0x01, 0x01)
+			IO (Decode16, IT8516E_FIRST_SC, IT8516E_FIRST_SC, 0x01, 0x01)
+		})
+	}
+
+	/*
+	 * Get CPU temperature from first PM channel (in 10th Kelvin)
+	 */
+	Method (CTK)
+	{
+		Store (EC_READ (0x52), Local0)
+		If (And (Local0, EC_ERROR_MASK)) {
+			Return (0)
+		}
+		Multiply (Local0, 10, Local0)	/* Convert to 10th °C */
+		Return (Add (Local0, 2732))	/* Return as 10th Kelvin */
+	}
+}
+#endif
+
+#ifdef IT8516E_SECOND_DATA
+Device (PM2) {
+	Name (_HID, EisaId("PNP0C02"))
+	Name (_STR, Unicode("IT8516E PM Channel 2"))
+	Name (_UID, SUPERIO_UID(PM, 2))
+
+	/*
+	 * The EC firmware exposes fan and GPIO control through the
+	 * second PM channel.
+	 */
+
+	#undef EC_DATA_IO
+	#define EC_DATA_IO IT8516E_SECOND_DATA
+	#undef EC_SC_IO
+	#define EC_SC_IO IT8516E_SECOND_SC
+	#include <ec/acpi/ec.asl>
+
+	Method (_CRS)
+	{
+		/* Announce the used i/o ports to the OS */
+		Return (ResourceTemplate () {
+			IO (Decode16, IT8516E_SECOND_DATA, IT8516E_SECOND_DATA, 0x01, 0x01)
+			IO (Decode16, IT8516E_SECOND_SC, IT8516E_SECOND_SC, 0x01, 0x01)
+		})
+	}
+
+	/*
+	 * Get CPU temperature from second PM channel (in 10th Kelvin)
+	 */
+	Method (CTK)
+	{
+		Acquire (EC_MUTEX, 0xffff)
+		Store (SEND_EC_COMMAND (0x20), Local0) /* GET_CPUTEMP */
+		If (And (Local0, EC_ERROR_MASK)) {
+			Release (EC_MUTEX)
+			Return (0)
+		}
+		Store (RECV_EC_DATA (), Local0)	/* Temp low byte in 64th °C */
+		If (And (Local0, EC_ERROR_MASK)) {
+			Release (EC_MUTEX)
+			Return (0)
+		}
+		Store (RECV_EC_DATA (), Local1)	/* Temp high byte in 64th °C */
+		If (And (Local1, EC_ERROR_MASK)) {
+			Release (EC_MUTEX)
+			Return (0)
+		}
+		Release (EC_MUTEX)
+
+		Or (ShiftLeft (Local1, 8), Local0, Local0)
+		Store (Divide (Multiply (Local0, 10), 64), Local0)	/* Convert to 10th °C */
+		Return (Add (Local0, 2732))				/* Return as 10th Kelvin */
+	}
+}
+#endif



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