[coreboot-gerrit] Patch set updated for coreboot: eee6ed8 lynxpoint: Add a function to set an individual GPIO
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Wed Nov 20 01:10:22 CET 2013
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4137
-gerrit
commit eee6ed881aafb18427ccb7b6f262da48987ec25e
Author: Duncan Laurie <dlaurie at chromium.org>
Date: Tue Apr 23 13:44:37 2013 -0700
lynxpoint: Add a function to set an individual GPIO
This will be used in a later commit to do some specific
power sequencing.
Change-Id: Id7f033bb80aed915c2498ea910cb3ac7290da37f
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48947
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
src/southbridge/intel/lynxpoint/gpio.c | 19 +++++++++++++++++++
src/southbridge/intel/lynxpoint/lp_gpio.c | 14 ++++++++++++++
src/southbridge/intel/lynxpoint/pch.h | 4 ++++
3 files changed, 37 insertions(+)
diff --git a/src/southbridge/intel/lynxpoint/gpio.c b/src/southbridge/intel/lynxpoint/gpio.c
index b492068..147a1c0 100644
--- a/src/southbridge/intel/lynxpoint/gpio.c
+++ b/src/southbridge/intel/lynxpoint/gpio.c
@@ -109,3 +109,22 @@ unsigned get_gpios(const int *gpio_num_array)
}
return vector;
}
+
+void set_gpio(int gpio_num, int value)
+{
+ static const int gpio_reg_offsets[] = {0xc, 0x38, 0x48};
+ u16 gpio_base = get_gpio_base();
+ int index, bit;
+ u32 config;
+
+ if (gpio_num > MAX_GPIO_NUMBER)
+ return; /* Just ignore wrong gpio numbers. */
+
+ index = gpio_num / 32;
+ bit = gpio_num % 32;
+
+ config = inl(gpio_base + gpio_reg_offsets[index]);
+ config &= ~(1 << bit);
+ config |= value << bit;
+ outl(config, gpio_base + gpio_reg_offsets[index]);
+}
diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.c b/src/southbridge/intel/lynxpoint/lp_gpio.c
index a6e4f5c..604423a 100644
--- a/src/southbridge/intel/lynxpoint/lp_gpio.c
+++ b/src/southbridge/intel/lynxpoint/lp_gpio.c
@@ -107,3 +107,17 @@ unsigned get_gpios(const int *gpio_num_array)
}
return vector;
}
+
+void set_gpio(int gpio_num, int value)
+{
+ u16 gpio_base = get_gpio_base();
+ u32 conf0;
+
+ if (gpio_num > MAX_GPIO_NUMBER)
+ return;
+
+ conf0 = inl(gpio_base + GPIO_CONFIG0(gpio_num));
+ conf0 &= ~GPO_LEVEL_MASK;
+ conf0 |= value << GPO_LEVEL_SHIFT;
+ outl(conf0, gpio_base + GPIO_CONFIG0(gpio_num));
+}
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index c049573..4bdb926 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -193,6 +193,10 @@ int get_gpio(int gpio_num);
* the array of gpio pin numbers to scan, terminated by -1.
*/
unsigned get_gpios(const int *gpio_num_array);
+/*
+ * set GPIO pin value
+ */
+void set_gpio(int gpio_num, int value);
#endif
#define MAINBOARD_POWER_OFF 0
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