[coreboot-gerrit] Patch set updated for coreboot: 6de6b09 CBMEM ARM: Prefer get_cbmem_table() over cbmem_late_set_table()

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3560

-gerrit

commit 6de6b0961613e743c17035a6eec123013a21fd9e
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Sat Jun 22 14:05:28 2013 +0300

    CBMEM ARM: Prefer get_cbmem_table() over cbmem_late_set_table()
    
    Implementing get_cbmem_table() allows initializing CBMEM earlier.
    
    Change-Id: I973f3a84dd9aaa2839959df5dda22909fdb9edeb
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/mainboard/google/pit/mainboard.c  | 10 ++++------
 src/mainboard/google/snow/mainboard.c | 10 ++++------
 2 files changed, 8 insertions(+), 12 deletions(-)

diff --git a/src/mainboard/google/pit/mainboard.c b/src/mainboard/google/pit/mainboard.c
index 7dd8388..b91040c 100644
--- a/src/mainboard/google/pit/mainboard.c
+++ b/src/mainboard/google/pit/mainboard.c
@@ -221,14 +221,12 @@ static void mainboard_init(device_t dev)
 	// gpio_info();
 }
 
-static void setup_cbmem(void)
+void get_cbmem_table(uint64_t *base, uint64_t *size)
 {
-	u64 size = CONFIG_COREBOOT_TABLES_SIZE;
-	u64 base = CONFIG_SYS_SDRAM_BASE +
+	*size = CONFIG_COREBOOT_TABLES_SIZE;
+	*base = CONFIG_SYS_SDRAM_BASE +
 				((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) -
 				CONFIG_COREBOOT_TABLES_SIZE;
-	cbmem_late_set_table(base, size);
-	cbmem_init(base, size);
 }
 
 static void mainboard_enable(device_t dev)
@@ -236,7 +234,7 @@ static void mainboard_enable(device_t dev)
 	dev->ops->init = &mainboard_init;
 
 	/* set up coreboot tables */
-	setup_cbmem();
+	cbmem_initialize();
 
 	/* set up dcache and MMU */
 	/* FIXME: this should happen via resource allocator */
diff --git a/src/mainboard/google/snow/mainboard.c b/src/mainboard/google/snow/mainboard.c
index 8805be5..93cc303 100644
--- a/src/mainboard/google/snow/mainboard.c
+++ b/src/mainboard/google/snow/mainboard.c
@@ -262,14 +262,12 @@ static void mainboard_init(device_t dev)
 	// gpio_info();
 }
 
-static void setup_cbmem(void)
+void get_cbmem_table(uint64_t *base, uint64_t *size)
 {
-	u64 size = CONFIG_COREBOOT_TABLES_SIZE;
-	u64 base = CONFIG_SYS_SDRAM_BASE +
+	*size = CONFIG_COREBOOT_TABLES_SIZE;
+	*base = CONFIG_SYS_SDRAM_BASE +
 				((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) -
 				CONFIG_COREBOOT_TABLES_SIZE;
-	cbmem_late_set_table(base, size);
-	cbmem_init(base, size);
 }
 
 static void mainboard_enable(device_t dev)
@@ -277,7 +275,7 @@ static void mainboard_enable(device_t dev)
 	dev->ops->init = &mainboard_init;
 
 	/* set up coreboot tables */
-	setup_cbmem();
+	cbmem_initialize();
 
 	/* set up dcache and MMU */
 	/* FIXME: this should happen via resource allocator */