[coreboot-gerrit] New patch to review for coreboot: ea57a43 usbdebug AMD: Add choice of EHCI controller

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Tue Sep 17 20:04:35 CEST 2013


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3928

-gerrit

commit ea57a4352ee21a6562770a66a4b61dd3d1d51ece
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Tue Sep 17 00:12:05 2013 +0300

    usbdebug AMD: Add choice of EHCI controller
    
    Chipsets sb700 and sb800/hudson have more than one USB EHCI controller,
    implement the selection logic using already existing Kconfig option.
    
    Change-Id: I9e0df1669d73863c95c36a3a7fee40d58f6f097e
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/southbridge/amd/agesa/hudson/enable_usbdebug.c | 11 ++++++-----
 src/southbridge/amd/sb700/enable_usbdebug.c        | 10 ++++------
 src/southbridge/amd/sb800/enable_usbdebug.c        | 11 ++++++-----
 3 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
index 459df6f..cce3925 100644
--- a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
+++ b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
@@ -26,15 +26,16 @@
 #include <device/pci_def.h>
 #include "hudson.h"
 
-#ifndef HUDSON_DEVN_BASE
-#define HUDSON_DEVN_BASE 0
-#endif
-
 #define DEBUGPORT_MISC_CONTROL		0x80
 
 pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
 {
-	return PCI_DEV(0, HUDSON_DEVN_BASE + 0x12, 2);
+	if (hcd_idx==3)
+		return PCI_DEV(0, 0x16, 2);
+	else if (hcd_idx==2)
+		return PCI_DEV(0, 0x13, 2);
+	else
+		return PCI_DEV(0, 0x12, 2);
 }
 
 void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
diff --git a/src/southbridge/amd/sb700/enable_usbdebug.c b/src/southbridge/amd/sb700/enable_usbdebug.c
index 3d44a1a..57798c1 100644
--- a/src/southbridge/amd/sb700/enable_usbdebug.c
+++ b/src/southbridge/amd/sb700/enable_usbdebug.c
@@ -29,14 +29,12 @@
 
 #define DEBUGPORT_MISC_CONTROL		0x80
 
-/*
- * Note: The SB700 has two EHCI devices, D18:F2 and D19:F2.
- * This code currently only supports the first one, i.e., USB Debug devices
- * attached to physical USB ports belonging to the first EHCI device.
- */
 pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
 {
-	return PCI_DEV(0, 0x12, 2);
+	if (hcd_idx==2)
+		return PCI_DEV(0, 0x13, 2);
+	else
+		return PCI_DEV(0, 0x12, 2);
 }
 
 void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
diff --git a/src/southbridge/amd/sb800/enable_usbdebug.c b/src/southbridge/amd/sb800/enable_usbdebug.c
index 9277869..34d7608 100644
--- a/src/southbridge/amd/sb800/enable_usbdebug.c
+++ b/src/southbridge/amd/sb800/enable_usbdebug.c
@@ -26,15 +26,16 @@
 #include <device/pci_def.h>
 #include "sb800.h"
 
-#ifndef SB800_DEVN_BASE
-#define SB800_DEVN_BASE 0
-#endif
-
 #define DEBUGPORT_MISC_CONTROL		0x80
 
 pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
 {
-	return PCI_DEV(0, SB800_DEVN_BASE + 0x12, 2);
+	if (hcd_idx==3)
+		return PCI_DEV(0, 0x16, 2);
+	else if (hcd_idx==2)
+		return PCI_DEV(0, 0x13, 2);
+	else
+		return PCI_DEV(0, 0x12, 2);
 }
 
 void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)



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