[coreboot-gerrit] Patch merged into coreboot/master: 8f485de ASUS F2A85-M: Correct and clean up PCIe config

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 8f485dee0d38c1c5f1a29fa8840602774ef5f63d
Author: Rudolf Marek <r.marek at assembler.cz>
Date:   Sat May 4 00:08:34 2013 +0200

    ASUS F2A85-M: Correct and clean up PCIe config
    
    Assign the lanes correctly to the physical slots
    on the motherboard in `PlatformGnbPcie.c`.
    
    • UMI is connected to SB via 4x PCIe bridge 8.
    • The blue x16 slot is not shared with DDI and is routed
      through PCIe bridge 2.
    • The black x8 slot is in fact a x4 slot and uses all 4 GPPs
      from the CPU.
    • Assume that DDI is on out-of-PCIe-band lanes.
    
    Change-Id: I44c4c83e6a8e31d6150a602a0993972ac63105bd
    Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-on: http://review.coreboot.org/3194
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth <martin.roth at se-eng.com>
    Reviewed-by: David Hubbard <david.c.hubbard+coreboot at gmail.com>


See http://review.coreboot.org/3194 for details.

-gerrit