[coreboot-gerrit] New patch to review for coreboot: 8433643 qemu: q35: avoid address conflict
Gerd Hoffmann (kraxel@redhat.com)
gerrit at coreboot.org
Mon Sep 23 14:45:45 CEST 2013
Gerd Hoffmann (kraxel at redhat.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3938
-gerrit
commit 8433643ddf0cd0461a96731f35df1fe2aaa1b520
Author: Gerd Hoffmann <kraxel at redhat.com>
Date: Tue Sep 17 09:49:02 2013 +0200
qemu: q35: avoid address conflict
Change-Id: I3e87d8301988028ca0ea7d96c08b4e26ac15a7c2
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
---
src/southbridge/intel/i82801ix/i82801ix.h | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h
index ca28107..d84af3a 100644
--- a/src/southbridge/intel/i82801ix/i82801ix.h
+++ b/src/southbridge/intel/i82801ix/i82801ix.h
@@ -29,7 +29,16 @@
#define DEFAULT_TBAR 0xfed1b000
#define DEFAULT_RCBA 0xfed1c000
-#define DEFAULT_PMBASE 0x00000500 /* Speedstep code has this hardcoded, too. */
+#ifdef CONFIG_BOARD_EMULATION_QEMU_X86_Q35
+/*
+ * Qemu has the fw_cfg interface at 0x510. Move the pmbase to a
+ * non-conflicting address. No need to worry about speedstep, it
+ * is not supported by qemu and isn't enabled in the qemu config.
+ */
+# define DEFAULT_PMBASE 0x00000600
+#else
+# define DEFAULT_PMBASE 0x00000500 /* Speedstep code has this hardcoded, too. */
+#endif
#define DEFAULT_TCOBASE (DEFAULT_PMBASE + 0x60)
#define DEFAULT_GPIOBASE 0x00000580
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