[coreboot-gerrit] Patch set updated for coreboot: 30bfb55 northbridge/amd/agesa/family14: Sanitize #includes
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Sat Apr 5 16:35:46 CEST 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5427
-gerrit
commit 30bfb55dcc49f942fa0eb2f9f10cd0a078069da2
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Sun Mar 30 15:52:55 2014 +1100
northbridge/amd/agesa/family14: Sanitize #includes
Following the same reasoning as commit
1d87dac hp/pavilion_m6_1035dx: Sanitize #includes
Clean up the #include directives in this northbridge code.
Change-Id: Ib75d412bc021b1f6af3e9c83193848206e413274
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/northbridge/amd/agesa/family14/chip.h | 2 ++
src/northbridge/amd/agesa/family14/dimmSpd.c | 11 +++++------
src/northbridge/amd/agesa/family14/dimmSpd.h | 2 ++
src/northbridge/amd/agesa/family14/northbridge.c | 23 +++++++++++------------
4 files changed, 20 insertions(+), 18 deletions(-)
diff --git a/src/northbridge/amd/agesa/family14/chip.h b/src/northbridge/amd/agesa/family14/chip.h
index 56d9c92..1ab53a5 100644
--- a/src/northbridge/amd/agesa/family14/chip.h
+++ b/src/northbridge/amd/agesa/family14/chip.h
@@ -20,6 +20,8 @@
#ifndef _NB_AGESA_CHIP_H_
#define _NB_AGESA_CHIP_H_
+#include <stdint.h>
+
struct northbridge_amd_agesa_family14_config
{
/*
diff --git a/src/northbridge/amd/agesa/family14/dimmSpd.c b/src/northbridge/amd/agesa/family14/dimmSpd.c
index a3f5bb3..3531843 100644
--- a/src/northbridge/amd/agesa/family14/dimmSpd.c
+++ b/src/northbridge/amd/agesa/family14/dimmSpd.c
@@ -17,17 +17,16 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include "chip.h"
+#include "dimmSpd.h"
+
#include <device/pci_def.h>
#include <device/device.h>
+
#include <stdlib.h>
#include "OEM.h" /* SMBUS0_BASE_ADDRESS */
-/* warning: Porting.h includes an open #pragma pack(1) */
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-#include "dimmSpd.h"
-#include "chip.h"
+#include <vendorcode/amd/agesa/f14/Lib/amdlib.h>
/* uncomment for source level debug - GDB gets really confused otherwise. */
//#pragma optimize ("", off)
diff --git a/src/northbridge/amd/agesa/family14/dimmSpd.h b/src/northbridge/amd/agesa/family14/dimmSpd.h
index 57512c7..527b9c7 100644
--- a/src/northbridge/amd/agesa/family14/dimmSpd.h
+++ b/src/northbridge/amd/agesa/family14/dimmSpd.h
@@ -25,6 +25,8 @@
#ifndef _DIMMSPD_H_
#define _DIMMSPD_H_
+#include <vendorcode/amd/agesa/f14/AGESA.h>
+
/*----------------------------------------------------------------------------------------
* D E F I N I T I O N S A N D M A C R O S
*----------------------------------------------------------------------------------------
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 847e6dd..d168f3d 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -17,27 +17,26 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <console/console.h>
#include <arch/io.h>
-#include <stdint.h>
+#include <console/console.h>
+#include <cbmem.h>
+
+#include <cpu/cpu.h>
+#include <cpu/x86/lapic.h>
+#include <cpu/amd/mtrr.h>
#include <device/device.h>
+#include <device/hypertransport.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <device/hypertransport.h>
+#include <lib.h>
+#include <stdint.h>
#include <stdlib.h>
#include <string.h>
-#include <lib.h>
-#include <cpu/cpu.h>
-#include <cbmem.h>
-
-#include <cpu/x86/lapic.h>
-#include <cpu/amd/mtrr.h>
#include "agesawrapper.h"
#include "northbridge.h"
-#if CONFIG_AMD_SB_CIMX
-#include <sb_cimx.h>
-#endif
+
+#include <southbridge/amd/cimx/sb800/sb_cimx.h>
//#define FX_DEVS NODE_NUMS
#define FX_DEVS 1
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