[coreboot-gerrit] New patch to review for coreboot: fa7bb8d f2a85-m: various clean ups

Patrick Georgi (patrick@georgi-clan.de) gerrit at coreboot.org
Sun Apr 13 09:00:36 CEST 2014


Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5497

-gerrit

commit fa7bb8d42984fafa9bbff0a8ea59b406a986052e
Author: Patrick Georgi <patrick at georgi-clan.de>
Date:   Sun Apr 13 08:58:38 2014 +0200

    f2a85-m: various clean ups
    
    Two defines were unused, another two now use AGESA names
    in the background to avoid them drifting apart (if someone
    copy&pastes this board as a template for a new chipset).
    
    Also avoid to mention early_serial.h
    
    Change-Id: I291ec5eae03e5db20b5672ec9f53972fb060c2be
    Signed-off-by: Patrick Georgi <patrick at georgi-clan.de>
---
 src/mainboard/asus/f2a85-m/romstage.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index 990343b..cbe059f 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -30,6 +30,7 @@
 #include <console/console.h>
 #include <console/loglevel.h>
 #include "agesawrapper.h"
+#include <Proc/Fch/Fch.h>
 #include "cpu/x86/bist.h"
 #include "cpu/x86/lapic.h"
 #include "southbridge/amd/agesa/hudson/hudson.h"
@@ -39,7 +40,7 @@
 #include "src/drivers/pc80/i8259.c"
 #include "cbmem.h"
 /* Note that the IT8603E is a strip down version of this chip */
-#include "superio/ite/it8728f/early_serial.h"
+#include <superio/ite/it8728f/it8728f.h>
 #define SERIAL_DEV PNP_DEV(0x2e, IT8728F_SP1)
 #define GPIO_DEV PNP_DEV(0x2e, IT8728F_GPIO)
 
@@ -47,10 +48,8 @@
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
 void disable_cache_as_ram(void);
 
-#define MMIO_NON_POSTED_START 0xfed00000
-#define MMIO_NON_POSTED_END   0xfedfffff
-#define SB_MMIO 0xFED80000
-#define SB_MMIO_MISC32(x) *(volatile u32 *)(SB_MMIO + 0xE00 + (x))
+#define SB_MMIO ACPI_MMIO_BASE
+#define SB_MMIO_MISC32(x) *(volatile u32 *)(SB_MMIO + MISC_BASE + (x))
 
 static void sbxxx_enable_48mhzout(void)
 {



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