[coreboot-gerrit] Patch set updated for coreboot: d372d3e cpu/amd/agesa: Include lapic_timer.c in SMM objects if requested

Alexandru Gagniuc (mr.nuke.me@gmail.com) gerrit at coreboot.org
Mon Apr 14 18:31:31 CEST 2014


Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5501

-gerrit

commit d372d3e52fff30678b5a798c65ea580287813457
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date:   Mon Apr 14 10:54:00 2014 -0500

    cpu/amd/agesa: Include lapic_timer.c in SMM objects if requested
    
    This is needed on AMD CPUs for the implementation of udelay().
    lapic_timer.c cannot always be included in SMM, as some chipsets have
    a separate udelay implementation for SMM. Thus, restrict it to AGESA
    based CPUs.
    
    Change-Id: Ifa02ca73455b382f830c9b30b80b4f1bb18706b4
    Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
 src/cpu/amd/agesa/Makefile.inc | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/cpu/amd/agesa/Makefile.inc b/src/cpu/amd/agesa/Makefile.inc
index dbdfba9..e74cd51 100644
--- a/src/cpu/amd/agesa/Makefile.inc
+++ b/src/cpu/amd/agesa/Makefile.inc
@@ -26,3 +26,7 @@ subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY16_KB) += family16kb
 romstage-$(CONFIG_HAVE_ACPI_RESUME) += s3_resume.c
 ramstage-$(CONFIG_HAVE_ACPI_RESUME) += s3_resume.c
 cpu_incs += $(src)/cpu/amd/agesa/cache_as_ram.inc
+
+ifeq ($(CONFIG_UDELAY_LAPIC), y)
+smm-$(CONFIG_HAVE_SMI_HANDLER) += ../../x86/lapic/apic_timer.c
+endif



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