[coreboot-gerrit] Patch set updated for coreboot: 38d327d hp/pavilion_m6_1035dx: Do not re-init EC and lid SMI on S3 resume

Alexandru Gagniuc (mr.nuke.me@gmail.com) gerrit at coreboot.org
Sun Apr 20 06:31:32 CEST 2014


Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5555

-gerrit

commit 38d327dfc7a97d0d15e6d5b723a01ace8ff38c8e
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date:   Sat Apr 19 15:10:14 2014 -0500

    hp/pavilion_m6_1035dx: Do not re-init EC and lid SMI on S3 resume
    
    It's not needed, and puts the EC back into APM mode. The EC does not
    shut down during S3 sleep, so we don't need to re-initialize it.
    Lid SMI will have been disabled in the switch to ACPI mode, don't
    re-enable it.
    
    Change-Id: I2c06df140f63427dac32ae095d29e68f64135358
    Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
 src/mainboard/hp/pavilion_m6_1035dx/mainboard.c | 19 ++++++++++++-------
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c b/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c
index 2e8436b..81260f1 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c
@@ -32,19 +32,21 @@
 
 #include <southbridge/amd/agesa/hudson/smi.h>
 
-/*************************************************
- * enable the dedicated function in parmer board.
- *************************************************/
+
+static void pavilion_cold_boot_init(void)
+{
+	/* Lid SMI is only used in non-ACPI mode; leave it off in S3 resume */
+	hudson_configure_gevent_smi(EC_LID_GEVENT, SMI_MODE_SMI, SMI_LVL_LOW);
+	/* EC is not powered off during S3 sleep */
+	pavilion_m6_1035dx_ec_init();
+}
+
 static void mainboard_enable(device_t dev)
 {
 	printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
 
-	pavilion_m6_1035dx_ec_init();
-
 	hudson_configure_gevent_smi(EC_SMI_GEVENT, SMI_MODE_SMI, SMI_LVL_HIGH);
-	hudson_configure_gevent_smi(EC_LID_GEVENT, SMI_MODE_SMI, SMI_LVL_LOW);
 	hudson_enable_smi_generation();
-
 	/*
 	 * The mainboard is the first place that we get control in ramstage. Check
 	 * for S3 resume and call the approriate AGESA/CIMx resume functions.
@@ -53,7 +55,10 @@ static void mainboard_enable(device_t dev)
 	acpi_slp_type = acpi_get_sleep_type();
 	if (acpi_slp_type == 3)
 		agesawrapper_fchs3earlyrestore();
+	else
 #endif
+		pavilion_cold_boot_init();
+
 }
 
 struct chip_operations mainboard_ops = {



More information about the coreboot-gerrit mailing list