[coreboot-gerrit] Patch merged into coreboot/master: cf38fac hp/pavilion_m6_1035dx: Map PCIE PME sources to GPE 0x18
gerrit at coreboot.org
gerrit at coreboot.org
Mon Apr 21 21:32:53 CEST 2014
the following patch was just integrated into master:
commit cf38facbd2255562cfbf2a2bc528794fafa5891a
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date: Sat Apr 19 16:22:53 2014 -0500
hp/pavilion_m6_1035dx: Map PCIE PME sources to GPE 0x18
The PCIE PME pin from the APU is connected to GEVENT8, but the
northbridge's ASL hardcodes this to GPE 0x18. Adjust the SCI map
accordingly.
Change-Id: Ie395e62919f6e97ef9bcc45c736f9debf4e09ba0
Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Reviewed-on: http://review.coreboot.org/5556
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin at gmail.com>
See http://review.coreboot.org/5556 for details.
-gerrit
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