[coreboot-gerrit] Patch set updated for coreboot: a82b6f5 Move redundant Makefile rules from arch to top level.

Furquan Shaikh (furquan@google.com) gerrit at coreboot.org
Wed Apr 23 21:28:16 CEST 2014


Furquan Shaikh (furquan at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5571

-gerrit

commit a82b6f597bee5f3d6da71707fd91d7e3a4e1d7d3
Author: Furquan Shaikh <furquan at google.com>
Date:   Tue Apr 22 16:33:22 2014 -0700

    Move redundant Makefile rules from arch to top level.
    
    Remove all the common Makefile rules like coreboot.pre, coreboot.pre1 and others
    from arch level Makefile.inc to top level Makefile.inc.
    Also, organize Makefile.inc at arch level into per-stage rules and variables.
    
    Change-Id: I7dc5b2d31c959b55bb92d9c7811427c4dada1db5
    Signed-off-by: Furquan Shaikh <furquan at google.com>
---
 Makefile.inc                | 157 +++++++++++++++++
 src/arch/armv7/Makefile.inc | 264 +++++++++++-----------------
 src/arch/x86/Makefile.inc   | 409 +++++++++++++++-----------------------------
 3 files changed, 390 insertions(+), 440 deletions(-)

diff --git a/Makefile.inc b/Makefile.inc
index 72f3951..326358e 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -408,3 +408,160 @@ crossgcc-clean: clean-for-update
 
 tools: $(objutil)/kconfig/conf $(objutil)/cbfstool/cbfstool $(objutil)/cbfstool/rmodtool $(objutil)/nvramtool/nvramtool $(objutil)/romcc/romcc $(objutil)/sconfig/sconfig
 
+########################################################################################################################################################################
+# Common recipes for all stages
+########################################################################################################################################################################
+
+$(objcbfs)/%.bin: $(objcbfs)/%.elf
+		  @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
+		  $(OBJCOPY) -O binary $< $@
+
+$(objcbfs)/%.elf: $(objcbfs)/%.debug
+		  @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
+		  cp $< $@.tmp
+		  $(NM) -n $@.tmp | sort > $(basename $@).map
+		  $(OBJCOPY) --strip-debug $@.tmp
+		  $(OBJCOPY) --add-gnu-debuglink=$< $@.tmp
+		  mv $@.tmp $@
+
+########################################################################################################################################################################
+# Build the final rom image
+########################################################################################################################################################################
+
+COREBOOT_ROM_DEPENDENCIES:=
+ifeq ($(CONFIG_PAYLOAD_ELF),y)
+COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE)
+endif
+ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
+COREBOOT_ROM_DEPENDENCIES+=seabios
+endif
+ifeq ($(CONFIG_PAYLOAD_FILO),y)
+COREBOOT_ROM_DEPENDENCIES+=filo
+endif
+ifeq ($(CONFIG_PAYLOAD_GRUB2),y)
+COREBOOT_ROM_DEPENDENCIES+=grub2
+endif
+
+extract_nth=$(word $(1), $(subst |, ,$(2)))
+
+ifneq ($(CONFIG_UPDATE_IMAGE),y)
+prebuild-files = \
+	       $(foreach file,$(cbfs-files), \
+	       $(CBFSTOOL) $@.tmp \
+	       add$(if $(filter stage,$(call extract_nth,3,$(file))),-stage)$(if $(filter payload,$(call extract_nth,3,$(file))),-payload) \
+	       -f $(call extract_nth,1,$(file)) \
+	       -n $(call extract_nth,2,$(file)) $(if $(filter-out stage,$(call extract_nth,3,$(file))),-t $(call extract_nth,3,$(file))) \
+	       $(if $(call extract_nth,4,$(file)),-b $(call extract_nth,4,$(file))) &&)
+prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
+
+$(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file)
+		      $(CBFSTOOL) $@.tmp create -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \
+		      -B $(objcbfs)/bootblock.bin -a 64 \
+		      $(COREBOOT_PRE1_OPTS)
+		      $(prebuild-files) true
+		      $(call add-cpu-microcode-to-cbfs,$@.tmp)
+		      mv $@.tmp $@
+else
+.PHONY: $(obj)/coreboot.pre1
+$(obj)/coreboot.pre1: $(CBFSTOOL)
+		      mv $(obj)/coreboot.rom $@
+endif
+
+ifeq ($(CONFIG_PAYLOAD_LINUX),y)
+LINUX_ADDITIONAL_CONFIG:=
+ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUX_COMMAND_LINE))),)
+      LINUX_ADDITIONAL_CONFIG+=-C $(CONFIG_LINUX_COMMAND_LINE)
+endif
+ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUX_INITRD))),)
+      LINUX_ADDITIONAL_CONFIG+=-I $(CONFIG_LINUX_INITRD)
+endif
+endif
+
+ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y)
+REFCODE_BLOB=$(obj)/refcode.rmod
+$(REFCODE_BLOB): $(RMODTOOL)
+		 $(RMODTOOL) -i $(CONFIG_REFCODE_BLOB_FILE) -o $@
+endif
+
+$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) $$(VBOOT_STUB) $(REFCODE_BLOB)
+	@printf "    CBFS       $(subst $(obj)/,,$(@))\n"
+	cp $(obj)/coreboot.pre $@.tmp
+	$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/ramstage.elf -n $(CONFIG_CBFS_PREFIX)/ramstage -c $(CBFS_COMPRESS_FLAG)
+ifeq ($(CONFIG_PAYLOAD_NONE),y)
+	@printf "    PAYLOAD    none (as specified by user)\n"
+endif
+ifeq ($(CONFIG_PAYLOAD_ELF),y)
+	@printf "    PAYLOAD    $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
+	$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
+endif
+ifeq ($(CONFIG_PAYLOAD_LINUX),y)
+	@printf "    PAYLOAD    $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
+	$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) $(LINUX_ADDITIONAL_CONFIG)
+endif
+ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
+	@printf "    PAYLOAD    SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
+	$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
+ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),)
+ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0)
+	@printf "    SeaBIOS    Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n"
+	$(CBFSTOOL) $@.tmp add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup
+endif
+endif
+endif
+ifeq ($(CONFIG_PAYLOAD_FILO),y)
+	@printf "    PAYLOAD    FILO (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
+	$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
+endif
+ifeq ($(CONFIG_PAYLOAD_GRUB2),y)
+	@printf "    PAYLOAD    GRUB2 (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
+	$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
+endif
+ifeq ($(CONFIG_PAYLOAD_TIANOCORE),y)
+	@printf "    PAYLOAD    Tiano Core (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
+	$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
+endif
+ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y)
+	@printf "    CONFIG     $(DOTCONFIG)\n"
+	if [ -f $(DOTCONFIG) ]; then \
+	echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \
+	sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \
+	$(CBFSTOOL) $@.tmp add -f $(obj)/config.tmp -n config -t raw; rm -f $(obj)/config.tmp ; fi
+endif
+ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y)
+	$(CBFSTOOL) $@.tmp add-stage -f $(VBOOT_STUB) -n $(CONFIG_CBFS_PREFIX)/vboot -c $(CBFS_COMPRESS_FLAG)
+endif
+ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y)
+	$(CBFSTOOL) $@.tmp add-stage -f $(REFCODE_BLOB) -n $(CONFIG_CBFS_PREFIX)/refcode -c $(CBFS_COMPRESS_FLAG)
+endif
+ifeq ($(CONFIG_PXE_ROM),y)
+	$(CBFSTOOL) $@.tmp add -f $(CONFIG_PXE_ROM_FILE) -n pci$(CONFIG_PXE_ROM_ID).rom -t raw
+endif
+ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
+ifeq ($(CONFIG_CPU_MICROCODE_IN_CBFS),y)
+	@printf "    UPDATE-FIT \n"
+	$(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES)
+endif
+endif
+	mv $@.tmp $@
+	@printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
+	$(CBFSTOOL) $@ print
+
+cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg
+bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
+bootsplash.jpg-type := bootsplash
+
+ifeq ($(CONFIG_ARCH_ARMV7),y)
+ROMSTAGE_ELF := romstage.elf
+endif
+ifeq ($(CONFIG_ARCH_X86),y)
+ROMSTAGE_ELF := romstage_xip.elf
+endif
+
+$(obj)/coreboot.pre: $(objcbfs)/$(ROMSTAGE_ELF) $(obj)/coreboot.pre1 $(CBFSTOOL)
+	@printf "    CBFS       $(subst $(obj)/,,$(@))\n"
+	cp $(obj)/coreboot.pre1 $@.tmp
+	$(CBFSTOOL) $@.tmp add-stage \
+		-f $(objcbfs)/$(ROMSTAGE_ELF) \
+		-n $(CONFIG_CBFS_PREFIX)/romstage -c none \
+		$(COREBOOT_PRE_OPTS)
+	mv $@.tmp $@
diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc
index 6395b0c..aa85cc6 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/armv7/Makefile.inc
@@ -22,91 +22,18 @@
 ##
 ################################################################################
 
+################################################################################
 # Take care of subdirectories
+################################################################################
 subdirs-y += boot/
 subdirs-y += lib/
 
 ################################################################################
-# Build the final rom image
-COREBOOT_ROM_DEPENDENCIES:=
-ifeq ($(CONFIG_PAYLOAD_ELF),y)
-COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE)
-endif
-
-extract_nth=$(word $(1), $(subst |, ,$(2)))
-
-ifneq ($(CONFIG_UPDATE_IMAGE),y)
-prebuild-files = \
-	$(foreach file,$(cbfs-files), \
-	$(CBFSTOOL) $@.tmp \
-	add$(if $(filter stage,$(call extract_nth,3,$(file))),-stage)$(if $(filter payload,$(call extract_nth,3,$(file))),-payload) \
-	-f $(call extract_nth,1,$(file)) \
-	-n $(call extract_nth,2,$(file)) $(if $(filter-out stage,$(call extract_nth,3,$(file))),-t $(call extract_nth,3,$(file))) \
-	$(if $(call extract_nth,4,$(file)),-b $(call extract_nth,4,$(file))) &&)
-prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
-
-# TODO Change -b to Kconfig variable.
-$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $(objcbfs)/romstage.elf $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file)
-	$(CBFSTOOL) $@.tmp create -m armv7 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \
-		-B $(objcbfs)/bootblock.bin -a 64 \
-		-b $(CONFIG_BOOTBLOCK_ROM_OFFSET) \
-		-H $(CONFIG_CBFS_HEADER_ROM_OFFSET) \
-		-o $(CONFIG_CBFS_ROM_OFFSET)
-	@printf "    CBFS       $(subst $(obj)/,,$(@))\n"
-	$(CBFSTOOL) $@.tmp add-stage \
-		-f $(objcbfs)/romstage.elf -b 0 \
-		-n $(CONFIG_CBFS_PREFIX)/romstage -c none
-	$(prebuild-files) true
-	$(call add-cpu-microcode-to-cbfs,$@.tmp)
-	mv $@.tmp $@
-else
-.PHONY: $(obj)/coreboot.pre
-$(obj)/coreboot.pre: $(CBFSTOOL)
-	mv $(obj)/coreboot.rom $@
-endif
-
-$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE)
-	@printf "    CBFS       $(subst $(obj)/,,$(@))\n"
-	cp $(obj)/coreboot.pre $@.tmp
-	$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/ramstage.elf -n $(CONFIG_CBFS_PREFIX)/ramstage -c $(CBFS_COMPRESS_FLAG)
-ifeq ($(CONFIG_PAYLOAD_NONE),y)
-	@printf "    PAYLOAD    none (as specified by user)\n"
-endif
-ifeq ($(CONFIG_PAYLOAD_ELF),y)
-	@printf "    PAYLOAD    $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
-	$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
-endif
-ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y)
-	@printf "    CONFIG     $(DOTCONFIG)\n"
-	if [ -f $(DOTCONFIG) ]; then \
-	echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \
-	sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \
-	$(CBFSTOOL) $@.tmp add -f $(obj)/config.tmp -n config -t raw; rm -f $(obj)/config.tmp ; fi
-endif
-	mv $@.tmp $@
-	@printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
-	$(CBFSTOOL) $@ print
-
-bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
-bootsplash.jpg-type := bootsplash
-
+# ARM specific options
 ################################################################################
-# armv7 specific tools
 
-################################################################################
-# Common recipes for all stages
-
-$(objcbfs)/%.bin: $(objcbfs)/%.elf
-	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-	$(OBJCOPY) -O binary $< $@
-
-$(objcbfs)/%.elf: $(objcbfs)/%.debug
-	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-	cp $< $@.tmp
-	$(NM) -n $@.tmp | sort > $(basename $@).map
-	$(OBJCOPY) --strip-debug $@.tmp
-	$(OBJCOPY) --add-gnu-debuglink=$< $@.tmp
-	mv $@.tmp $@
+COREBOOT_PRE1_OPTS = -m armv7 -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) -o $(CONFIG_CBFS_ROM_OFFSET)
+COREBOOT_PRE_OPTS = -b 0
 
 stages_c = $(src)/arch/armv7/stages.c
 stages_o = $(obj)/arch/armv7/stages.o
@@ -115,26 +42,6 @@ $(stages_o): $(stages_c) $(obj)/config.h
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
 	$(CC) -I. $(INCLUDES) -c -o $@ $< -marm
 
-
-################################################################################
-# Build the ramstage (stage 2)
-
-$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/armv7/ramstage.ld
-	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld
-else
-	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $<
-endif
-
-$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME)
-	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group
-else
-	$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
-endif
-
 CFLAGS += \
 	-ffixed-r8\
 	-march=armv7-a\
@@ -143,82 +50,16 @@ CFLAGS += \
 	-mthumb\
 	-mthumb-interwork
 
-ldscripts =
-ldscripts += $(src)/arch/armv7/romstage.ld
-
-#crt0s += $(src)/cpu/arm/fpu_enable.inc
-# FIXME: CONFIG_NEON or something similar for ARM?
-#ifeq ($(CONFIG_SSE),y)
-#crt0s += $(src)/cpu/arm/sse_enable.inc
-#endif
-
-crt0s += $(cpu_incs)
-crt0s += $(cpu_incs-y)
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
-	@printf "    CC         romstage.inc\n"
-	$(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
-
-# Things that appear in every board
-ramstage-y += exception.c
-ramstage-y += exception_asm.S
+################################################################################
+# Bootblock
+################################################################################
 
 bootblock-y += cache.c
-
-romstage-y += cache.c
-romstage-y += div0.c
-
-ramstage-y += div0.c
-#ramstage-y += interrupts.c
-ramstage-y += cache.c
-ramstage-y += mmu.c
-
-romstage-y += eabi_compat.c
-ramstage-y += eabi_compat.c
 bootblock-y += eabi_compat.c
-
-ramstage-y += boot.c
-ramstage-y += tables.c
-
-romstage-y += memset.S
-ramstage-y += memset.S
 bootblock-y += memset.S
-romstage-y += memcpy.S
-ramstage-y += memcpy.S
 bootblock-y += memcpy.S
-romstage-y += memmove.S
-ramstage-y += memmove.S
 bootblock-y += memmove.S
 
-romstage-srcs += $(objgenerated)/crt0.s
-ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
-ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
-endif
-ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
-endif
-ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl
-# make doesn't have arithmetic operators or greater-than comparisons
-ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl
-endif
-ifeq ($(CONFIG_ACPI_SSDTX_NUM),5)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl
-endif
-endif
-
-ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
-endif
-
-################################################################################
-# Build the bootblock
-
 bootblock_lds = $(src)/arch/armv7/bootblock.lds
 bootblock_lds += $(chipset_bootblock_lds)
 
@@ -262,6 +103,30 @@ else
 endif
 
 ################################################################################
+# Romstage
+################################################################################
+
+romstage-y += cache.c
+romstage-y += div0.c
+romstage-y += eabi_compat.c
+romstage-y += memset.S
+romstage-y += memcpy.S
+romstage-y += memmove.S
+romstage-srcs += $(objgenerated)/crt0.s
+
+ldscripts =
+ldscripts += $(src)/arch/armv7/romstage.ld
+
+
+#crt0s += $(src)/cpu/arm/fpu_enable.inc
+# FIXME: CONFIG_NEON or something similar for ARM?
+#ifeq ($(CONFIG_SSE),y)
+#crt0s += $(src)/cpu/arm/sse_enable.inc
+#endif
+
+crt0s += $(cpu_incs)
+crt0s += $(cpu_incs-y)
+
 # Build the romstage
 
 $(objcbfs)/romstage.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage.ld
@@ -290,3 +155,68 @@ $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/b
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
 	$(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
 
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
+	@printf "    CC         romstage.inc\n"
+	$(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
+
+################################################################################
+# Ramstage
+################################################################################
+
+# Things that appear in every board
+ramstage-y += exception.c
+ramstage-y += exception_asm.S
+ramstage-y += div0.c
+#ramstage-y += interrupts.c
+ramstage-y += cache.c
+ramstage-y += mmu.c
+ramstage-y += eabi_compat.c
+ramstage-y += boot.c
+ramstage-y += tables.c
+ramstage-y += memset.S
+ramstage-y += memcpy.S
+ramstage-y += memmove.S
+ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
+
+# Build the ramstage (stage 2)
+
+$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/armv7/ramstage.ld
+	@printf "    CC         $(subst $(obj)/,,$(@))\n"
+ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
+	$(LD) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld
+else
+	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $<
+endif
+
+$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME)
+	@printf "    CC         $(subst $(obj)/,,$(@))\n"
+ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
+	$(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group
+else
+	$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
+endif
+
+ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
+endif
+ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
+endif
+ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl
+# make doesn't have arithmetic operators or greater-than comparisons
+ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl
+endif
+ifeq ($(CONFIG_ACPI_SSDTX_NUM),5)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl
+endif
+endif
+
+ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
+endif
+
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index db8e500..a09c66f 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -21,7 +21,9 @@
 ##
 ################################################################################
 
+################################################################################
 # Take care of subdirectories
+################################################################################
 subdirs-y += boot
 # subdirs-y += init
 subdirs-y += lib
@@ -42,128 +44,6 @@ cmos_layout.bin-type = 0x01aa
 OPTION_TABLE_H:=$(obj)/option_table.h
 endif
 
-################################################################################
-# Build the final rom image
-COREBOOT_ROM_DEPENDENCIES:=
-ifeq ($(CONFIG_PAYLOAD_ELF),y)
-COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE)
-endif
-ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
-COREBOOT_ROM_DEPENDENCIES+=seabios
-endif
-ifeq ($(CONFIG_PAYLOAD_FILO),y)
-COREBOOT_ROM_DEPENDENCIES+=filo
-endif
-ifeq ($(CONFIG_PAYLOAD_GRUB2),y)
-COREBOOT_ROM_DEPENDENCIES+=grub2
-endif
-
-extract_nth=$(word $(1), $(subst |, ,$(2)))
-
-ifneq ($(CONFIG_UPDATE_IMAGE),y)
-prebuild-files = \
-	$(foreach file,$(cbfs-files), \
-	$(CBFSTOOL) $@.tmp \
-	add$(if $(filter stage,$(call extract_nth,3,$(file))),-stage)$(if $(filter payload,$(call extract_nth,3,$(file))),-payload) \
-	-f $(call extract_nth,1,$(file)) \
-	-n $(call extract_nth,2,$(file)) $(if $(filter-out stage,$(call extract_nth,3,$(file))),-t $(call extract_nth,3,$(file))) \
-	$(if $(call extract_nth,4,$(file)),-b $(call extract_nth,4,$(file))) &&)
-prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
-
-$(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file)
-	$(CBFSTOOL) $@.tmp create -m x86 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \
-		-B $(objcbfs)/bootblock.bin -a 64 \
-		-o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) ))
-	$(prebuild-files) true
-	$(call add-cpu-microcode-to-cbfs,$@.tmp)
-	mv $@.tmp $@
-else
-.PHONY: $(obj)/coreboot.pre1
-$(obj)/coreboot.pre1: $(CBFSTOOL)
-	mv $(obj)/coreboot.rom $@
-endif
-
-ifeq ($(CONFIG_PAYLOAD_LINUX),y)
-LINUX_ADDITIONAL_CONFIG:=
-ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUX_COMMAND_LINE))),)
-  LINUX_ADDITIONAL_CONFIG+=-C $(CONFIG_LINUX_COMMAND_LINE)
-endif
-ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUX_INITRD))),)
-  LINUX_ADDITIONAL_CONFIG+=-I $(CONFIG_LINUX_INITRD)
-endif
-endif
-
-ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y)
-REFCODE_BLOB=$(obj)/refcode.rmod
-$(REFCODE_BLOB): $(RMODTOOL)
-	$(RMODTOOL) -i $(CONFIG_REFCODE_BLOB_FILE) -o $@
-endif
-
-$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) $$(VBOOT_STUB) $(REFCODE_BLOB)
-	@printf "    CBFS       $(subst $(obj)/,,$(@))\n"
-	cp $(obj)/coreboot.pre $@.tmp
-	$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/ramstage.elf -n $(CONFIG_CBFS_PREFIX)/ramstage -c $(CBFS_COMPRESS_FLAG)
-ifeq ($(CONFIG_PAYLOAD_NONE),y)
-	@printf "    PAYLOAD    none (as specified by user)\n"
-endif
-ifeq ($(CONFIG_PAYLOAD_ELF),y)
-	@printf "    PAYLOAD    $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
-	$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
-endif
-ifeq ($(CONFIG_PAYLOAD_LINUX),y)
-	@printf "    PAYLOAD    $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
-	$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) $(LINUX_ADDITIONAL_CONFIG)
-endif
-ifeq ($(CONFIG_PAYLOAD_SEABIOS),y)
-	@printf "    PAYLOAD    SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
-	$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
-ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),)
-ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0)
-	@printf "    SeaBIOS    Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n"
-	$(CBFSTOOL) $@.tmp add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup
-endif
-endif
-endif
-ifeq ($(CONFIG_PAYLOAD_FILO),y)
-	@printf "    PAYLOAD    FILO (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
-	$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
-endif
-
-ifeq ($(CONFIG_PAYLOAD_GRUB2),y)
-	@printf "    PAYLOAD    GRUB2 (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
-	$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
-endif
-
-ifeq ($(CONFIG_PAYLOAD_TIANOCORE),y)
-	@printf "    PAYLOAD    Tiano Core (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n"
-	$(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG)
-endif
-ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y)
-	@printf "    CONFIG     $(DOTCONFIG)\n"
-	if [ -f $(DOTCONFIG) ]; then \
-	echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \
-	sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \
-	$(CBFSTOOL) $@.tmp add -f $(obj)/config.tmp -n config -t raw; rm -f $(obj)/config.tmp ; fi
-endif
-ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y)
-	$(CBFSTOOL) $@.tmp add-stage -f $(VBOOT_STUB) -n $(CONFIG_CBFS_PREFIX)/vboot -c $(CBFS_COMPRESS_FLAG)
-endif
-ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y)
-	$(CBFSTOOL) $@.tmp add-stage -f $(CONFIG_REFCODE_BLOB_FILE) -n $(CONFIG_CBFS_PREFIX)/refcode -c $(CBFS_COMPRESS_FLAG)
-endif
-ifeq ($(CONFIG_PXE_ROM),y)
-	$(CBFSTOOL) $@.tmp add -f $(CONFIG_PXE_ROM_FILE) -n pci$(CONFIG_PXE_ROM_ID).rom -t raw
-endif
-ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
-ifeq ($(CONFIG_CPU_MICROCODE_ADDED_DURING_BUILD),y)
-	@printf "    UPDATE-FIT \n"
-	$(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES)
-endif
-endif
-	mv $@.tmp $@
-	@printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
-	$(CBFSTOOL) $@ print
-
 stripped_vgabios_id = $(call strip_quotes,$(CONFIG_VGA_BIOS_ID))
 cbfs-files-$(CONFIG_VGA_BIOS) += pci$(stripped_vgabios_id).rom
 pci$(stripped_vgabios_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_FILE))
@@ -173,9 +53,8 @@ cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin
 mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE))
 mbi.bin-type := mbi
 
-cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg
-bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
-bootsplash.jpg-type := bootsplash
+COREBOOT_PRE1_OPTS = -m x86 -o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) ))
+COREBOOT_PRE_OPTS  = -b $(shell cat $(objcbfs)/base_xip.txt)
 
 ################################################################################
 # i386 specific tools
@@ -189,158 +68,11 @@ $(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.l
 	@printf "    OPTION     $(subst $(obj)/,,$(@))\n"
 	$(NVRAMTOOL) -y $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout -L $@
 
-################################################################################
-# Common recipes for all stages
-
-$(objcbfs)/%.bin: $(objcbfs)/%.elf
-	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-	$(OBJCOPY) -O binary $< $@
-
-$(objcbfs)/%.elf: $(objcbfs)/%.debug
-	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-	cp $< $@.tmp
-	$(NM) -n $@.tmp | sort > $(basename $@).map
-	$(OBJCOPY) --strip-debug $@.tmp
-	$(OBJCOPY) --add-gnu-debuglink=$< $@.tmp
-	mv $@.tmp $@
 
 ################################################################################
-# Build the ramstage (stage 2)
-
-ramstage-libs ?=
-
-ifeq ($(CONFIG_RELOCATABLE_RAMSTAGE),y)
-
-$(eval $(call rmodule_link,$(objcbfs)/ramstage.debug, $(objgenerated)/ramstage.o, $(CONFIG_HEAP_SIZE)))
-
-# The rmodule_link defintion creates an elf file with .rmod extension.
-$(objcbfs)/ramstage.elf: $(objcbfs)/ramstage.debug.rmod
-	cp $< $@
-
-else
-
-$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/x86/ramstage.ld
-	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld
-else
-	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $<
-endif
-
-endif
-
-$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $$(ramstage-libs)
-	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) --end-group
-else
-	$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group
-endif
-
+# Bootblock
 ################################################################################
-# done
-
-crt0s = $(src)/arch/x86/init/prologue.inc
-ldscripts =
-ldscripts += $(src)/arch/x86/init/romstage.ld
-crt0s += $(src)/cpu/x86/32bit/entry32.inc
-ldscripts += $(src)/cpu/x86/32bit/entry32.lds
-
-crt0s += $(src)/cpu/x86/fpu_enable.inc
-ifeq ($(CONFIG_SSE),y)
-crt0s += $(src)/cpu/x86/sse_enable.inc
-endif
-
-crt0s += $(cpu_incs)
-crt0s += $(cpu_incs-y)
-
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
-
-ifeq ($(CONFIG_ROMCC),y)
-crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
-endif
-
-ifeq ($(CONFIG_ROMCC),y)
-ifeq ($(CONFIG_MMX),y)
- ifeq ($(CONFIG_SSE),y)
-  ROMCCFLAGS := -mcpu=p4 -O2 # MMX, SSE
- else
-  ROMCCFLAGS := -mcpu=p2 -O2 # MMX, !SSE
- endif
-else
- ROMCCFLAGS := -mcpu=i386 -O2 # !MMX, !SSE
-endif
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
-	printf "    ROMCC      romstage.inc\n"
-	$(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@
-else
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
-	@printf "    CC         romstage.inc\n"
-	$(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
-	@printf "    POST       romstage.inc\n"
-	sed -e 's/\.rodata/.rom.data/g' -e 's/\^\.text/.section .rom.text/g' \
-		-e 's/\^\.section \.text/.section .rom.text/g' $^ > $@.tmp
-	mv $@.tmp $@
-endif
-
-# Things that appear in every board
-romstage-srcs += $(objgenerated)/crt0.s
-ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
-ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
-ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c
-endif
-endif
-ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
-endif
-ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/reset.c),)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
-endif
-ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl
-ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt2.asl),)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl
-endif
-ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt3.asl),)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl
-endif
-ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt4.asl),)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl
-endif
-ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt5.asl),)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl
-endif
-ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/fadt.c),)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c
-endif
-endif
-ifeq ($(CONFIG_HAVE_SMI_HANDLER),y)
-ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/smihandler.c),)
-smm-srcs += src/mainboard/$(MAINBOARDDIR)/smihandler.c
-endif
-endif
-ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c),)
-ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
-endif
-
-################################################################################
-# Build the final rom image
-
-$(obj)/coreboot.pre: $(objcbfs)/romstage_xip.elf $(obj)/coreboot.pre1 $(CBFSTOOL)
-	@printf "    CBFS       $(subst $(obj)/,,$(@))\n"
-	cp $(obj)/coreboot.pre1 $@.tmp
-	$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/romstage_xip.elf \
-		-n $(CONFIG_CBFS_PREFIX)/romstage -c none \
-		-b $(shell cat $(objcbfs)/base_xip.txt)
-	mv $@.tmp $@
-
-################################################################################
 # Build the bootblock
 
 bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb
@@ -404,6 +136,58 @@ else
 endif
 
 ################################################################################
+# Romstage
+################################################################################
+
+crt0s = $(src)/arch/x86/init/prologue.inc
+ldscripts =
+ldscripts += $(src)/arch/x86/init/romstage.ld
+crt0s += $(src)/cpu/x86/32bit/entry32.inc
+ldscripts += $(src)/cpu/x86/32bit/entry32.lds
+
+crt0s += $(src)/cpu/x86/fpu_enable.inc
+ifeq ($(CONFIG_SSE),y)
+crt0s += $(src)/cpu/x86/sse_enable.inc
+endif
+
+crt0s += $(cpu_incs)
+crt0s += $(cpu_incs-y)
+
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
+
+ifeq ($(CONFIG_ROMCC),y)
+crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
+endif
+
+ifeq ($(CONFIG_ROMCC),y)
+ifeq ($(CONFIG_MMX),y)
+	ifeq ($(CONFIG_SSE),y)
+		ROMCCFLAGS := -mcpu=p4 -O2 # MMX, SSE
+	else
+		ROMCCFLAGS := -mcpu=p2 -O2 # MMX, !SSE
+	endif
+else
+	ROMCCFLAGS := -mcpu=i386 -O2 # !MMX, !SSE
+endif
+
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
+	printf "    ROMCC      romstage.inc\n"
+	$(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@
+else
+
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
+	@printf "    CC         romstage.inc\n"
+	$(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
+	@printf "    POST       romstage.inc\n"
+	sed -e 's/\.rodata/.rom.data/g' -e 's/\^\.text/.section .rom.text/g' \
+		-e 's/\^\.section \.text/.section .rom.text/g' $^ > $@.tmp
+	mv $@.tmp $@
+endif
+
+romstage-srcs += $(objgenerated)/crt0.s
+
 # Build the romstage
 
 romstage-libs ?=
@@ -460,6 +244,85 @@ $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/b
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
 	$(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
 
+################################################################################
+# Ramstage
+################################################################################
+
+ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
+ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
+ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c
+endif
+endif
+ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
+endif
+ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/reset.c),)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
+endif
+ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt2.asl),)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl
+endif
+ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt3.asl),)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl
+endif
+ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt4.asl),)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl
+endif
+ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt5.asl),)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl
+endif
+ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/fadt.c),)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c
+endif
+endif
+ifeq ($(CONFIG_HAVE_SMI_HANDLER),y)
+ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/smihandler.c),)
+smm-srcs += src/mainboard/$(MAINBOARDDIR)/smihandler.c
+endif
+endif
+ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c),)
+ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
+endif
+
+# Build the ramstage (stage 2)
+
+ramstage-libs ?=
+
+ifeq ($(CONFIG_RELOCATABLE_RAMSTAGE),y)
+
+$(eval $(call rmodule_link,$(objcbfs)/ramstage.debug, $(objgenerated)/ramstage.o, $(CONFIG_HEAP_SIZE)))
+
+# The rmodule_link defintion creates an elf file with .rmod extension.
+$(objcbfs)/ramstage.elf: $(objcbfs)/ramstage.debug.rmod
+	cp $< $@
+
+else
+
+$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/x86/ramstage.ld
+	@printf "    CC         $(subst $(obj)/,,$(@))\n"
+ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
+	$(LD) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld
+else
+	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $<
+endif
+
+endif
+
+$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $$(ramstage-libs)
+	@printf "    CC         $(subst $(obj)/,,$(@))\n"
+ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
+	$(LD) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) --end-group
+else
+	$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group
+endif
+
+
+################################################################################
+
 seabios:
 	$(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \
 			HOSTCC="$(HOSTCC)" \



More information about the coreboot-gerrit mailing list