[coreboot-gerrit] Patch merged into coreboot/master: cf7b498 superio/fintek/*: Factor out generic romstage component
gerrit at coreboot.org
gerrit at coreboot.org
Sat Apr 26 18:22:13 CEST 2014
the following patch was just integrated into master:
commit cf7b4989083cb3fd1adf34dc5e07d4ac253e8f85
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Wed Apr 23 21:52:25 2014 +1000
superio/fintek/*: Factor out generic romstage component
The romstage of Fintek Super I/O's is identical, leading to replication
of essentially the same code prone to bitrot. Herein we consolidate the
early pre-ram UART initialisation code into fintek/common, rather we
leave the exceptions to be implemented under model/.
More precisely we provide a well documented version of early_serial.c
under fintek/common and select by way of Kconfig as a generic romstage
component to Super I/O support. We leave future Super I/O's the option
to implement `non-standard` initialisation code should such a (unlikely)
need araise. A primary advantage is that new support for romstage serial
is now trival to add. We also provide some Kconfig documentation while
here.
Change-Id: I3c62561558a62ece944a167ba302fb7076bba001
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5575
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick at georgi-clan.de>
See http://review.coreboot.org/5575 for details.
-gerrit
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