[coreboot-gerrit] New patch to review for coreboot: 350d0b9 mainboard/pcengines/alix1c: Collect and sort includes

Edward O'Callaghan (eocallaghan@alterapraxis.com) gerrit at coreboot.org
Sat Aug 9 08:10:15 CEST 2014


Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6552

-gerrit

commit 350d0b9c1a5cb3053e761860a02f70499ecb7307
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Sat Aug 9 16:09:28 2014 +1000

    mainboard/pcengines/alix1c: Collect and sort includes
    
    Change-Id: I1ad36bede57cf5580693287f00b78ba3e9aedee8
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/mainboard/pcengines/alix1c/irq_tables.c |  2 +-
 src/mainboard/pcengines/alix1c/romstage.c   | 40 +++++++++++++++--------------
 2 files changed, 22 insertions(+), 20 deletions(-)

diff --git a/src/mainboard/pcengines/alix1c/irq_tables.c b/src/mainboard/pcengines/alix1c/irq_tables.c
index 9ee8a07..df8cc53 100644
--- a/src/mainboard/pcengines/alix1c/irq_tables.c
+++ b/src/mainboard/pcengines/alix1c/irq_tables.c
@@ -17,9 +17,9 @@
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 */
 
+#include <arch/io.h>
 #include <arch/pirq_routing.h>
 #include <console/console.h>
-#include <arch/io.h>
 #include "southbridge/amd/cs5536/cs5536.h"
 
 /* Platform IRQs */
diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c
index 204f0bd..2c4912a 100644
--- a/src/mainboard/pcengines/alix1c/romstage.c
+++ b/src/mainboard/pcengines/alix1c/romstage.c
@@ -17,31 +17,39 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <arch/hlt.h>
+#include <arch/io.h>
+#include <console/console.h>
+#include <cpu/amd/car.h>
+#include <cpu/amd/lxdef.h>
+#include <cpu/x86/bist.h>
+#include <cpu/x86/msr.h>
+#include <device/pci_def.h>
+#include <device/pnp_def.h>
 #include <stdint.h>
 #include <stdlib.h>
 #include <spd.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <arch/hlt.h>
-#include <console/console.h>
 #include <lib.h>
-#include "cpu/x86/bist.h"
-#include "cpu/x86/msr.h"
-#include <cpu/amd/lxdef.h>
-#include <cpu/amd/car.h>
+
+#include <superio/winbond/common/winbond.h>
+#include <superio/winbond/w83627hf/w83627hf.h>
 #include "southbridge/amd/cs5536/cs5536.h"
 #include "northbridge/amd/lx/raminit.h"
 
+/* FIXME: .c includes */
+#include "southbridge/amd/cs5536/early_setup.c"
+#include "northbridge/amd/lx/pll_reset.c"
+#include "lib/generic_sdram.c"
+#include "cpu/amd/geode_lx/cpureginit.c"
+#include "cpu/amd/geode_lx/syspreinit.c"
+#include "cpu/amd/geode_lx/msrinit.c"
+
+
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
 /* The ALIX1.C has no SMBus; the setup is hard-wired. */
 static void cs5536_enable_smbus(void) { }
 
-#include "southbridge/amd/cs5536/early_setup.c"
-#include <superio/winbond/common/winbond.h>
-#include <superio/winbond/w83627hf/w83627hf.h>
-
 /* The part is a Hynix hy5du121622ctp-d43.
  *
  * HY 5D U 12 16 2 2 C <blank> T <blank> P D43
@@ -101,12 +109,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 	return spdbytes[address];
 }
 
-#include "northbridge/amd/lx/pll_reset.c"
-#include "lib/generic_sdram.c"
-#include "cpu/amd/geode_lx/cpureginit.c"
-#include "cpu/amd/geode_lx/syspreinit.c"
-#include "cpu/amd/geode_lx/msrinit.c"
-
 void main(unsigned long bist)
 {
 	static const struct mem_controller memctrl[] = {



More information about the coreboot-gerrit mailing list