[coreboot-gerrit] Patch set updated for coreboot: 5332b2d mainboard/lenovo/g505s/Kconfig: Remove HUDSON_LEGACY_FREE

Edward O'Callaghan (eocallaghan@alterapraxis.com) gerrit at coreboot.org
Wed Dec 3 10:20:43 CET 2014


Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7625

-gerrit

commit 5332b2dae3e192d1d06598802cfef853adbdb205
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Tue Dec 2 19:35:28 2014 +1100

    mainboard/lenovo/g505s/Kconfig: Remove HUDSON_LEGACY_FREE
    
    The Embedded Controller sits behind the LPC bridge and so needs
    LPC decodes to be enabled.
    
    Remove the LPC decode enable out of agesawrapper.c. The enable
    is in fact done in: 'VOID FchInitResetLpcProgram(IN VOID *FchDataPtr)'
    which writes the magic '0xFF03FFD5' to register 0x44 of the PCI 14.3
    LPC Bridge to enable LPC decodes when HUDSON_LEGACY_FREE is not defined.
    
    Change-Id: I0b4e99cc0d6f89f0261f26ee61b8c175a373c730
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/mainboard/lenovo/g505s/Kconfig    | 4 ----
 src/mainboard/lenovo/g505s/romstage.c | 4 ----
 2 files changed, 8 deletions(-)

diff --git a/src/mainboard/lenovo/g505s/Kconfig b/src/mainboard/lenovo/g505s/Kconfig
index fb753dc..fc3a6ac 100644
--- a/src/mainboard/lenovo/g505s/Kconfig
+++ b/src/mainboard/lenovo/g505s/Kconfig
@@ -68,8 +68,4 @@ config VGA_BIOS_ID
 	string
 	default "1002,990b"
 
-config HUDSON_LEGACY_FREE
-	bool
-	default y
-
 endif # BOARD_LENOVO_G505S
diff --git a/src/mainboard/lenovo/g505s/romstage.c b/src/mainboard/lenovo/g505s/romstage.c
index 9411ac8..d142a9d 100644
--- a/src/mainboard/lenovo/g505s/romstage.c
+++ b/src/mainboard/lenovo/g505s/romstage.c
@@ -40,10 +40,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	u32 val;
 	agesawrapper_amdinitmmio();
 
-	/* Set LPC decode enables. */
-	pci_devfn_t dev = PCI_DEV(0, 0x14, 3);
-	pci_write_config32(dev, 0x44, 0xff03ffd5);
-
 	hudson_lpc_port80();
 
 	if (!cpu_init_detectedx && boot_cpu()) {



More information about the coreboot-gerrit mailing list