[coreboot-gerrit] New patch to review for coreboot: ca73324 northbridge/amd/agesa/family15rl: Sanitize #includes

[Edward O'Callaghan (eocallaghan@alterapraxis.com)]

Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7640

-gerrit

commit ca733247571ab9bbc37ddce275ea1eb2c3aaa194
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Thu Dec 4 23:23:11 2014 +1100

    northbridge/amd/agesa/family15rl: Sanitize #includes
    
    Change-Id: I7cf2b33fed428d843b946b175288403aad7ce33c
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/northbridge/amd/agesa/family15rl/chip.h        |  4 ++-
 src/northbridge/amd/agesa/family15rl/northbridge.c | 30 ++++++++++------------
 2 files changed, 16 insertions(+), 18 deletions(-)

diff --git a/src/northbridge/amd/agesa/family15rl/chip.h b/src/northbridge/amd/agesa/family15rl/chip.h
index 4d92f22..bab48bc 100644
--- a/src/northbridge/amd/agesa/family15rl/chip.h
+++ b/src/northbridge/amd/agesa/family15rl/chip.h
@@ -20,9 +20,11 @@
 #ifndef _NB_AGESA_CHIP_H_
 #define _NB_AGESA_CHIP_H_
 
+#include <stdint.h>
+
 struct northbridge_amd_agesa_family15rl_config
 {
 	u8 spdAddrLookup[2][2][4];
 };
 
-#endif
+#endif /* _NB_AGESA_CHIP_H_ */
diff --git a/src/northbridge/amd/agesa/family15rl/northbridge.c b/src/northbridge/amd/agesa/family15rl/northbridge.c
index 9d2fa9f..e92fa83 100644
--- a/src/northbridge/amd/agesa/family15rl/northbridge.c
+++ b/src/northbridge/amd/agesa/family15rl/northbridge.c
@@ -18,31 +18,27 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <console/console.h>
 #include <arch/io.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
-#include <stdint.h>
+#include <console/console.h>
+#include <cbmem.h>
+#include <cpu/amd/amdfam15.h>
+#include <cpu/cpu.h>
+#include <cpu/x86/lapic.h>
+#include <cpu/amd/mtrr.h>
 #include <device/device.h>
+#include <device/hypertransport.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <device/hypertransport.h>
+#include <lib.h>
+#include <stdint.h>
 #include <stdlib.h>
 #include <string.h>
-#include <lib.h>
-#include <cpu/cpu.h>
-#include <cbmem.h>
-#include <AGESA.h>
 
-#include <cpu/x86/lapic.h>
-#include <cpu/amd/mtrr.h>
-
-#include <Porting.h>
-#include <Options.h>
-#include <Topology.h>
-#include <cpu/amd/amdfam15.h>
-#include <cpuRegisters.h>
 #include <northbridge/amd/agesa/agesawrapper.h>
+#include <vendorcode/amd/agesa/f15tn/AGESA.h>
+#include <vendorcode/amd/agesa/f15tn/Include/Options.h>
+#include <vendorcode/amd/agesa/f15tn/Include/Topology.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuRegisters.h>
 
 #define MAX_NODE_NUMS (MAX_NODES * MAX_DIES)