[coreboot-gerrit] Patch set updated for coreboot: 9c3ccad fsp_baytrail: Update microcode for Gold 3 FSP release

[Martin Roth (gaumless@gmail.com)]

Martin Roth (gaumless at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7647

-gerrit

commit 9c3ccad770984b7aa2da5d9ed53cbb45a90681e1
Author: Martin Roth <martin.roth at se-eng.com>
Date:   Thu Dec 4 18:12:20 2014 -0700

    fsp_baytrail: Update microcode for Gold 3 FSP release
    
    New microcode for Bay Trail I B2/B3 and D0 parts was released in the
    Gold 3 Bay Trail FSP release.
    
    Change the microcode size to an area instead of the exact size of the
    patches.  This will hopefully reduce updates to the microcode size
    
    Change-Id: I58b4c57a4bb0e478ffd28bd74a5de6bb61540dfe
    Signed-off-by: Martin Roth <martin.roth at se-eng.com>
---
 src/soc/intel/fsp_baytrail/microcode/microcode_blob.c | 10 ++++++++--
 src/soc/intel/fsp_baytrail/microcode/microcode_size.h |  2 +-
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c b/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c
index 51b6c19..709ff92 100644
--- a/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c
+++ b/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c
@@ -19,8 +19,14 @@
 
 unsigned microcode[] = {
 
-/* Size is 0x19800 - update in microcode_size.h when a patch gets changed. */
+/* Region size is 0x30000 - update in microcode_size.h if it gets larger. */
 #include "M0230672228.h"  // M0230672: Baytrail "Super SKU" B0/B1
-#include "M013067331E.h"  // M0130673: Baytrail I B2 / B3
+#include "M0130673322.h"  // M0130673: Baytrail I B2 / B3
+#include "M0130679901.h"  // M0130679: Baytrail I D0
 
+	/*  Dummy terminator  */
+	0x0, 0x0, 0x0, 0x0,
+	0x0, 0x0, 0x0, 0x0,
+	0x0, 0x0, 0x0, 0x0,
+	0x0, 0x0, 0x0, 0x0,
 };
diff --git a/src/soc/intel/fsp_baytrail/microcode/microcode_size.h b/src/soc/intel/fsp_baytrail/microcode/microcode_size.h
index df6082d..ec55314 100644
--- a/src/soc/intel/fsp_baytrail/microcode/microcode_size.h
+++ b/src/soc/intel/fsp_baytrail/microcode/microcode_size.h
@@ -1,2 +1,2 @@
 /* Maximum size of the area that the FSP will search for the correct microcode */
-#define MICROCODE_REGION_LENGTH 0x19800
+#define MICROCODE_REGION_LENGTH 0x30000