[coreboot-gerrit] New patch to review for coreboot: e498f72 nyan*: enable CLAMP_INPUTS

Marc Jones (marc.jones@se-eng.com) gerrit at coreboot.org
Wed Dec 10 04:20:33 CET 2014


Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7775

-gerrit

commit e498f72dd79b35a23df886a440dadc2ad603aa47
Author: Ken Chang <kenc at nvidia.com>
Date:   Mon Apr 21 17:54:28 2014 +0800

    nyan*: enable CLAMP_INPUTS
    
    Enable pinmux clamp function to avoid pinmux conflict.
    For pins which are configured to tristate enabled, the inputs to the
    controller will be clamped to zero. This can be used to avoid pinmux
    conflicts since the tristate bit is set to 1 in the power-on-reset
    pinmux setting.
    With pinmux clamp enabled, we need to configure all the input pins
    to tristate disabled.
    BUG=chrome-os-partner:27091
    BRANCH=None
    TEST=built and booted successfully, display worked fine.
    
    Original-Change-Id: Id79a717f2025c812908c7152d439351208aee8d2
    Original-Signed-off-by: Ken Chang <kenc at nvidia.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/194060
    Original-Reviewed-by: Gabe Black <gabeblack at chromium.org>
    (cherry picked from commit c95d6fe79810612cfad721667657cdcb87068d23)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: I1b23df8b90f83ea2b2c08c4364d90fe71533a5a0
---
 src/mainboard/google/nyan/mainboard.c       | 11 ++++++-----
 src/mainboard/google/nyan_big/mainboard.c   | 11 ++++++-----
 src/mainboard/google/nyan_blaze/mainboard.c | 11 ++++++-----
 src/soc/nvidia/tegra/apbmisc.c              |  8 +++++++-
 src/soc/nvidia/tegra/apbmisc.h              |  6 ++++++
 src/soc/nvidia/tegra/gpio.c                 |  2 +-
 src/soc/nvidia/tegra124/bootblock.c         |  6 +++---
 7 files changed, 35 insertions(+), 20 deletions(-)

diff --git a/src/mainboard/google/nyan/mainboard.c b/src/mainboard/google/nyan/mainboard.c
index c8e0131..6cc7b37 100644
--- a/src/mainboard/google/nyan/mainboard.c
+++ b/src/mainboard/google/nyan/mainboard.c
@@ -94,8 +94,6 @@ static void setup_pinmux(void)
 	// TODO(hungte) Revice pinmux setup, make nice little SoC functions for
 	// every single logical thing instead of dumping a wall of code below.
 	uint32_t pin_up = PINMUX_PULL_UP | PINMUX_INPUT_ENABLE,
-		 pin_up3 = (PINMUX_PULL_UP | PINMUX_INPUT_ENABLE |
-			    PINMUX_TRISTATE),
 		 pin_down = PINMUX_PULL_DOWN | PINMUX_INPUT_ENABLE,
 		 pin_none = PINMUX_PULL_NONE | PINMUX_INPUT_ENABLE;
 
@@ -113,7 +111,7 @@ static void setup_pinmux(void)
 	pinmux_set_config(PINMUX_SDMMC3_DAT3_INDEX,
 			  PINMUX_SDMMC3_DAT3_FUNC_SDMMC3 | pin_up);
 	pinmux_set_config(PINMUX_SDMMC3_CLK_LB_IN_INDEX,
-			  PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up3);
+			  PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up);
 	pinmux_set_config(PINMUX_SDMMC3_CLK_LB_OUT_INDEX,
 			  PINMUX_SDMMC3_CLK_LB_OUT_FUNC_SDMMC3 | pin_down);
 
@@ -155,8 +153,7 @@ static void setup_pinmux(void)
 
 	/* I2S1 */
 	pinmux_set_config(PINMUX_DAP2_DIN_INDEX,
-			  PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_TRISTATE |
-			  PINMUX_INPUT_ENABLE);
+			  PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
 	pinmux_set_config(PINMUX_DAP2_DOUT_INDEX,
 			  PINMUX_DAP2_DOUT_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
 	pinmux_set_config(PINMUX_DAP2_FS_INDEX,
@@ -167,6 +164,10 @@ static void setup_pinmux(void)
 	/* PWM1 */
 	pinmux_set_config(PINMUX_GPIO_PH1_INDEX,
 			  PINMUX_GPIO_PH1_FUNC_PWM1 | PINMUX_PULL_NONE);
+
+	/* DP HPD */
+	pinmux_set_config(PINMUX_DP_HPD_INDEX,
+			  PINMUX_DP_HPD_FUNC_DP | PINMUX_INPUT_ENABLE);
 }
 
 static void setup_kernel_info(void)
diff --git a/src/mainboard/google/nyan_big/mainboard.c b/src/mainboard/google/nyan_big/mainboard.c
index 3f698f5..6edf5fa 100644
--- a/src/mainboard/google/nyan_big/mainboard.c
+++ b/src/mainboard/google/nyan_big/mainboard.c
@@ -94,8 +94,6 @@ static void setup_pinmux(void)
 	// TODO(hungte) Revice pinmux setup, make nice little SoC functions for
 	// every single logical thing instead of dumping a wall of code below.
 	uint32_t pin_up = PINMUX_PULL_UP | PINMUX_INPUT_ENABLE,
-		 pin_up3 = (PINMUX_PULL_UP | PINMUX_INPUT_ENABLE |
-			    PINMUX_TRISTATE),
 		 pin_down = PINMUX_PULL_DOWN | PINMUX_INPUT_ENABLE,
 		 pin_none = PINMUX_PULL_NONE | PINMUX_INPUT_ENABLE;
 
@@ -113,7 +111,7 @@ static void setup_pinmux(void)
 	pinmux_set_config(PINMUX_SDMMC3_DAT3_INDEX,
 			  PINMUX_SDMMC3_DAT3_FUNC_SDMMC3 | pin_up);
 	pinmux_set_config(PINMUX_SDMMC3_CLK_LB_IN_INDEX,
-			  PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up3);
+			  PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up);
 	pinmux_set_config(PINMUX_SDMMC3_CLK_LB_OUT_INDEX,
 			  PINMUX_SDMMC3_CLK_LB_OUT_FUNC_SDMMC3 | pin_down);
 
@@ -155,8 +153,7 @@ static void setup_pinmux(void)
 
 	/* I2S1 */
 	pinmux_set_config(PINMUX_DAP2_DIN_INDEX,
-			  PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_TRISTATE |
-			  PINMUX_INPUT_ENABLE);
+			  PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
 	pinmux_set_config(PINMUX_DAP2_DOUT_INDEX,
 			  PINMUX_DAP2_DOUT_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
 	pinmux_set_config(PINMUX_DAP2_FS_INDEX,
@@ -167,6 +164,10 @@ static void setup_pinmux(void)
 	/* PWM1 */
 	pinmux_set_config(PINMUX_GPIO_PH1_INDEX,
 			  PINMUX_GPIO_PH1_FUNC_PWM1 | PINMUX_PULL_NONE);
+
+	 /* DP HPD */
+	pinmux_set_config(PINMUX_DP_HPD_INDEX,
+			PINMUX_DP_HPD_FUNC_DP | PINMUX_INPUT_ENABLE);
 }
 
 static void setup_kernel_info(void)
diff --git a/src/mainboard/google/nyan_blaze/mainboard.c b/src/mainboard/google/nyan_blaze/mainboard.c
index 3312dbc..af4d748 100644
--- a/src/mainboard/google/nyan_blaze/mainboard.c
+++ b/src/mainboard/google/nyan_blaze/mainboard.c
@@ -94,8 +94,6 @@ static void setup_pinmux(void)
 	// TODO(hungte) Revice pinmux setup, make nice little SoC functions for
 	// every single logical thing instead of dumping a wall of code below.
 	uint32_t pin_up = PINMUX_PULL_UP | PINMUX_INPUT_ENABLE,
-		 pin_up3 = (PINMUX_PULL_UP | PINMUX_INPUT_ENABLE |
-			    PINMUX_TRISTATE),
 		 pin_down = PINMUX_PULL_DOWN | PINMUX_INPUT_ENABLE,
 		 pin_none = PINMUX_PULL_NONE | PINMUX_INPUT_ENABLE;
 
@@ -113,7 +111,7 @@ static void setup_pinmux(void)
 	pinmux_set_config(PINMUX_SDMMC3_DAT3_INDEX,
 			  PINMUX_SDMMC3_DAT3_FUNC_SDMMC3 | pin_up);
 	pinmux_set_config(PINMUX_SDMMC3_CLK_LB_IN_INDEX,
-			  PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up3);
+			  PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up);
 	pinmux_set_config(PINMUX_SDMMC3_CLK_LB_OUT_INDEX,
 			  PINMUX_SDMMC3_CLK_LB_OUT_FUNC_SDMMC3 | pin_down);
 
@@ -155,8 +153,7 @@ static void setup_pinmux(void)
 
 	/* I2S1 */
 	pinmux_set_config(PINMUX_DAP2_DIN_INDEX,
-			  PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_TRISTATE |
-			  PINMUX_INPUT_ENABLE);
+			  PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
 	pinmux_set_config(PINMUX_DAP2_DOUT_INDEX,
 			  PINMUX_DAP2_DOUT_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
 	pinmux_set_config(PINMUX_DAP2_FS_INDEX,
@@ -167,6 +164,10 @@ static void setup_pinmux(void)
 	/* PWM1 */
 	pinmux_set_config(PINMUX_GPIO_PH1_INDEX,
 			  PINMUX_GPIO_PH1_FUNC_PWM1 | PINMUX_PULL_NONE);
+
+	 /* DP HPD */
+	pinmux_set_config(PINMUX_DP_HPD_INDEX,
+			PINMUX_DP_HPD_FUNC_DP | PINMUX_INPUT_ENABLE);
 }
 
 static void setup_kernel_info(void)
diff --git a/src/soc/nvidia/tegra/apbmisc.c b/src/soc/nvidia/tegra/apbmisc.c
index fea10b5..5983d54 100644
--- a/src/soc/nvidia/tegra/apbmisc.c
+++ b/src/soc/nvidia/tegra/apbmisc.c
@@ -22,8 +22,14 @@
 
 #include "apbmisc.h"
 
+static struct apbmisc *misc = (struct apbmisc *)TEGRA_APB_MISC_BASE;
+
 void enable_jtag(void)
 {
-	struct apbmisc *misc = (struct apbmisc *)TEGRA_APB_MISC_BASE;
 	write32(PP_CONFIG_CTL_JTAG, &misc->pp_config_ctl);
 }
+
+void clamp_tristate_inputs(void)
+{
+	write32(PP_PINMUX_CLAMP_INPUTS, &misc->pp_pinmux_global);
+}
diff --git a/src/soc/nvidia/tegra/apbmisc.h b/src/soc/nvidia/tegra/apbmisc.h
index 805d0bf..2f1811a 100644
--- a/src/soc/nvidia/tegra/apbmisc.h
+++ b/src/soc/nvidia/tegra/apbmisc.h
@@ -25,11 +25,17 @@
 struct apbmisc {
 	u32 reserved0[9];		/* ABP_MISC_PP_ offsets 00-20 */
 	u32 pp_config_ctl;		/* _CONFIG_CTL_0, offset 24 */
+	u32 reserved1[6];		/* APB_MISC_PP_ offsets 28-3C */
+	u32 pp_pinmux_global;		/* _PINMUX_GLOBAL_0, offset 40 */
 };
 
 #define PP_CONFIG_CTL_TBE		(1 << 7)
 #define PP_CONFIG_CTL_JTAG		(1 << 6)
 
+#define PP_PINMUX_CLAMP_INPUTS		(1 << 0)
+
+
 void enable_jtag(void);
+void clamp_tristate_inputs(void);
 
 #endif	/* __SOC_NVIDIA_TEGRA_APBMISC_H__ */
diff --git a/src/soc/nvidia/tegra/gpio.c b/src/soc/nvidia/tegra/gpio.c
index ac0fc3f..b10cded 100644
--- a/src/soc/nvidia/tegra/gpio.c
+++ b/src/soc/nvidia/tegra/gpio.c
@@ -29,7 +29,7 @@
 
 void __gpio_input(gpio_t gpio, u32 pull)
 {
-	u32 pinmux_config = PINMUX_INPUT_ENABLE | PINMUX_TRISTATE | pull;
+	u32 pinmux_config = PINMUX_INPUT_ENABLE | pull;
 
 	gpio_set_int_enable(gpio, 0);
 	gpio_set_out_enable(gpio, 0);
diff --git a/src/soc/nvidia/tegra124/bootblock.c b/src/soc/nvidia/tegra124/bootblock.c
index 6acd5ad..2857a90 100644
--- a/src/soc/nvidia/tegra124/bootblock.c
+++ b/src/soc/nvidia/tegra124/bootblock.c
@@ -31,6 +31,9 @@ void main(void)
 {
 	void *entry;
 
+	// enable pinmux clamp inputs
+	clamp_tristate_inputs();
+
 	// enable JTAG at the earliest stage
 	enable_jtag();
 
@@ -40,13 +43,11 @@ void main(void)
 	pinmux_set_config(PINMUX_KB_ROW9_INDEX, PINMUX_KB_ROW9_FUNC_UA3);
 	// Serial in, tristate_on.
 	pinmux_set_config(PINMUX_KB_ROW10_INDEX, PINMUX_KB_ROW10_FUNC_UA3 |
-						 PINMUX_TRISTATE |
 						 PINMUX_PULL_UP |
 						 PINMUX_INPUT_ENABLE);
 	// Mux some pins away from uart A.
 	pinmux_set_config(PINMUX_UART2_CTS_N_INDEX,
 			  PINMUX_UART2_CTS_N_FUNC_UB3 |
-			  PINMUX_TRISTATE |
 			  PINMUX_INPUT_ENABLE);
 	pinmux_set_config(PINMUX_UART2_RTS_N_INDEX,
 			  PINMUX_UART2_RTS_N_FUNC_UB3);
@@ -66,7 +67,6 @@ void main(void)
 			  PINMUX_CPU_PWR_REQ_FUNC_CPU);
 	pinmux_set_config(PINMUX_PWR_INT_N_INDEX,
 			  PINMUX_PWR_INT_N_FUNC_PMICINTR |
-			  PINMUX_TRISTATE |
 			  PINMUX_INPUT_ENABLE);
 
 	power_enable_cpu_rail();



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