[coreboot-gerrit] Patch merged into coreboot/master: 2d43a48 tegra124: set MOT bit for I2C-over-AUX

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 2d43a48158903fe41015b60808bbd7fa339f96b9
Author: Ken Chang <kenc at nvidia.com>
Date:   Tue Apr 15 17:00:17 2014 +0800

    tegra124: set MOT bit for I2C-over-AUX
    
    According to DP version 1.2a, The MOT (Middle-of-Transaction) bit
    must be set when the I2C transaction does not stop with the current
    AUX transaction.
    Thus the correct steps for an I2C read shall be:
    1. I2C command write with MOT set to 1
    2. I2C command read to the same address with MOT set to 0
    
    BUG=chrome-os-partner:27679
    TEST=EDID data read from LP140WH8 panel is correct while it's a
    repeated pattern of the first 16 bytes without this CL
    BRANCH=none
    
    Original-Change-Id: I0526beffb8852fbbe0eb5bb80e370261617a59b8
    Original-Signed-off-by: Ken Chang <kenc at nvidia.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/194915
    Original-Reviewed-by: Tom Warren <twarren at nvidia.com>
    Original-Reviewed-by: Hung-Te Lin <hungte at chromium.org>
    (cherry picked from commit 466ab0e00744f79ae3720474140d95e5f0828de9)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: Ic8ad38b4b08989dd7178d59151e1e276b8a58439
    Reviewed-on: http://review.coreboot.org/7763
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/7763 for details.

-gerrit