[coreboot-gerrit] Patch merged into coreboot/master: e57c303 tegra124: clock: Enforce PLL constraints for VCO and CF

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit e57c30315309a82de64da21dd83bba79864033c9
Author: Julius Werner <jwerner at chromium.org>
Date:   Fri Apr 11 18:23:12 2014 -0700

    tegra124: clock: Enforce PLL constraints for VCO and CF
    
    This patch adds some documentation to the additional PLL divisor
    constraints on the intermediary VCO and CF values that we just found out
    about. PLLC divisors for some oscillators had to be adjusted
    accordingly.
    
    It also adds a new clock_get_pll_input_khz() function to replace
    clock_get_osc_khz() in cases where you want to factor in the built-in
    predivider for 38.4 and 48 MHz oscillators.
    
    BUG=None
    TEST=Still boots.
    
    Original-Change-Id: Ib6e026dbab9fcc50d6d81a884774ad07c7b0dbc3
    Original-Signed-off-by: Julius Werner <jwerner at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/194474
    Original-Reviewed-by: Hung-Te Lin <hungte at chromium.org>
    (cherry picked from commit 3f1f565baf100edcd486055e4317c675c882396f)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: I091f42bf952a4b58ef2c30586baa5bf7496fa599
    Reviewed-on: http://review.coreboot.org/7768
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
    Tested-by: build bot (Jenkins)


See http://review.coreboot.org/7768 for details.

-gerrit