[coreboot-gerrit] New patch to review for coreboot: d15a13a Rambi: Set SOC_DISP_ON as GPIO to avoid LCD_VCC glitch

[Marc Jones (marc.jones@se-eng.com)]

Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7893

-gerrit

commit d15a13a58e6a91818270b7c43e7fad91b07a6a2f
Author: Kein Yuan <kein.yuan at intel.com>
Date:   Thu May 1 20:20:06 2014 -0700

    Rambi: Set SOC_DISP_ON as GPIO to avoid LCD_VCC glitch
    
    To avoid LCD_VCC glitch on cold reset, set SOC_DISP_ON as GPIO output high.
    After gfx initialize was done set it to native funtion 2.
    
    BUG=chrome-os-partner:25159
    BRANCH=firmware-rambi-5216.B
    TEST=Tested on Rambi and squawks, no LCD_VCC glitch anymore.
    
    Original-Change-Id: If16af498e910a8da1d77a9a66456eb767286a61a
    Original-Change-Id: Icf62588fa0338f89fafb3fe9246c26f16bcdaa60
    Original-Signed-off-by: Kein Yuan <kein.yuan at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/197985
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-by: Shawn Nematbakhsh <shawnn at chromium.org>
    Original-Commit-Queue: Shawn Nematbakhsh <shawnn at chromium.org>
    Original-Tested-by: Shawn Nematbakhsh <shawnn at chromium.org>
    (cherry picked from commit 6f7d621678f22133c9825565fedc77d19198b08c)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: Ibaf547b8d1c27811a1bec9fa3254d559c505a361
---
 src/mainboard/google/rambi/gpio.c      |  2 +-
 src/mainboard/google/rambi/mainboard.c | 11 +++++++++++
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/google/rambi/gpio.c b/src/mainboard/google/rambi/gpio.c
index a3c0d2d..77f56f7 100644
--- a/src/mainboard/google/rambi/gpio.c
+++ b/src/mainboard/google/rambi/gpio.c
@@ -33,7 +33,7 @@ static const struct soc_gpio_map gpncore_gpio_map[] = {
 	GPIO_FUNC2,	/* S0_NC06 - EDP_HPD_L */
 	GPIO_INPUT,	/* S0_NC07 - DDI1_DDCDATA - STRAP */
 	GPIO_NC,	/* S0_NC08 - NC */
-	GPIO_FUNC2,	/* S0_NC09 - SOC_DISP_ON_C */
+	GPIO_OUT_HIGH,	/* S0_NC09 - SOC_DISP_ON_C */
 	GPIO_FUNC2,	/* S0_NC10 - SOC_EDP_BLON_C */
 	GPIO_FUNC2,	/* S0_NC11 - SOC_DPST_PWM_C */
 	GPIO_NC,	/* S0_NC12 - NC */
diff --git a/src/mainboard/google/rambi/mainboard.c b/src/mainboard/google/rambi/mainboard.c
index cd3fc48..1290a15 100644
--- a/src/mainboard/google/rambi/mainboard.c
+++ b/src/mainboard/google/rambi/mainboard.c
@@ -36,6 +36,8 @@
 #include <smbios.h>
 #include "ec.h"
 #include "onboard.h"
+#include <baytrail/gpio.h>
+#include <bootstate.h>
 
 void mainboard_suspend_resume(void)
 {
@@ -174,3 +176,12 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
+
+static void edp_vdden_cb(void *unused)
+{
+	ncore_select_func(SOC_DDI1_VDDEN_PAD, PAD_FUNC2);
+}
+
+BOOT_STATE_INIT_ENTRIES(edp_vdden_bscb) = {
+	BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, edp_vdden_cb, NULL),
+};