[coreboot-gerrit] New patch to review for coreboot: c9b747f soc/samsung/exynos: Make 'ps_hold_setup()' static

[Edward O'Callaghan (eocallaghan@alterapraxis.com)]

Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7917

-gerrit

commit c9b747f23528548e57169f6b427c04de69d45b49
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Tue Dec 23 23:31:30 2014 +1100

    soc/samsung/exynos: Make 'ps_hold_setup()' static
    
    Change-Id: I272fea9c2767c341e8a545bf7a9ac18eefa2bda5
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/soc/samsung/exynos5250/power.c | 1 +
 src/soc/samsung/exynos5250/setup.h | 2 --
 src/soc/samsung/exynos5420/power.c | 3 ++-
 src/soc/samsung/exynos5420/setup.h | 2 --
 4 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/src/soc/samsung/exynos5250/power.c b/src/soc/samsung/exynos5250/power.c
index fb45dc0..27089c6 100644
--- a/src/soc/samsung/exynos5250/power.c
+++ b/src/soc/samsung/exynos5250/power.c
@@ -24,6 +24,7 @@
 #include <halt.h>
 #include "power.h"
 
+/* Set the PS-Hold drive value */
 static void ps_hold_setup(void)
 {
 	/* Set PS-Hold high */
diff --git a/src/soc/samsung/exynos5250/setup.h b/src/soc/samsung/exynos5250/setup.h
index c65747b..274ceb1 100644
--- a/src/soc/samsung/exynos5250/setup.h
+++ b/src/soc/samsung/exynos5250/setup.h
@@ -741,8 +741,6 @@ void dmc_config_prech(struct mem_timings *mem, struct exynos5_dmc *dmc);
  */
 void dmc_config_memory(struct mem_timings *mem, struct exynos5_dmc *dmc);
 
-/* Set the PS-Hold drive value */
-void ps_hold_setup(void);
 /*
  * Reset the DLL. This function is common between DDR3 and LPDDR2.
  * However, the reset value is different. So we are passing a flag
diff --git a/src/soc/samsung/exynos5420/power.c b/src/soc/samsung/exynos5420/power.c
index a7e5262..7d94712 100644
--- a/src/soc/samsung/exynos5420/power.c
+++ b/src/soc/samsung/exynos5420/power.c
@@ -26,7 +26,8 @@
 #include "power.h"
 #include "setup.h"
 
-void ps_hold_setup(void)
+/* Set the PS-Hold drive value */
+static void ps_hold_setup(void)
 {
 	/* Set PS-Hold high */
 	setbits_le32(&exynos_power->ps_hold_ctrl,
diff --git a/src/soc/samsung/exynos5420/setup.h b/src/soc/samsung/exynos5420/setup.h
index e0a7d1b..e7b5bd2 100644
--- a/src/soc/samsung/exynos5420/setup.h
+++ b/src/soc/samsung/exynos5420/setup.h
@@ -874,8 +874,6 @@ void dmc_config_prech(struct mem_timings *mem, struct exynos5_dmc *dmc);
  */
 void dmc_config_memory(struct mem_timings *mem, struct exynos5_dmc *dmc);
 
-/* Set the PS-Hold drive value */
-void ps_hold_setup(void);
 /*
  * Reset the DLL. This function is common between DDR3 and LPDDR2.
  * However, the reset value is different. So we are passing a flag