[coreboot-gerrit] New patch to review for coreboot: ecbb7ec baytrail: add more gpio init macros

[Marc Jones (marc.jones@se-eng.com)]

Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7953

-gerrit

commit ecbb7ecf70b7f2289daef156531e0613006e0515
Author: Kane Chen <kane.chen at intel.com>
Date:   Tue May 20 13:06:40 2014 +0800

    baytrail: add more gpio init macros
    
    GPIO init marcos are not enough to initialize different gpio attributes
    
    BUG=none
    TEST=emerge-rambi coreboot works well
    
    Original-Change-Id: I193fa7b3e22632cacb555e726e3dd3991f4f4faa
    Original-Signed-off-by: Kane Chen <kane.chen at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/200531
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    (cherry picked from commit 5e0fcbcd7cefcfccb5b565003336d197bb29e4cc)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: I6bf4db9397733a003dfdedc6eb63b82127917851
---
 src/soc/intel/baytrail/baytrail/gpio.h | 41 ++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/src/soc/intel/baytrail/baytrail/gpio.h b/src/soc/intel/baytrail/baytrail/gpio.h
index 741f3e9..5071b09 100644
--- a/src/soc/intel/baytrail/baytrail/gpio.h
+++ b/src/soc/intel/baytrail/baytrail/gpio.h
@@ -206,6 +206,47 @@
 	  .pad_conf1 = PAD_CONFIG1_DEFAULT, \
 	  .pad_val   = PAD_VAL_INPUT, }
 
+/* Direct / dedicated IRQ input - pass signal directly to apic */
+#define GPIO_DIRQ_LEVELHIGH_NO_PULL \
+	{ .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \
+		     | PAD_FUNC0 | PAD_IRQ_EN | PAD_TPE_IRQ | PAD_LEVEL_IRQ, \
+	  .pad_conf1 = PAD_CONFIG1_DEFAULT, \
+	  .pad_val   = PAD_VAL_INPUT, }
+
+/* Direct / dedicated IRQ input - pass signal directly to apic */
+#define GPIO_DIRQ_LEVELLOW_PU_20K \
+	{ .pad_conf0 = PAD_PU_20K | PAD_PULL_UP | PAD_CONFIG0_DEFAULT \
+		     | PAD_FUNC0 | PAD_IRQ_EN | PAD_TNE_IRQ | PAD_LEVEL_IRQ, \
+	  .pad_conf1 = PAD_CONFIG1_DEFAULT, \
+	  .pad_val   = PAD_VAL_INPUT, }
+
+/* Direct / dedicated IRQ input - pass signal directly to apic */
+#define GPIO_DIRQ_EDGELOW_PU_20K \
+	{ .pad_conf0 = PAD_PU_20K | PAD_PULL_UP | PAD_CONFIG0_DEFAULT \
+		     | PAD_FUNC0 | PAD_IRQ_EN | PAD_TNE_IRQ | PAD_EDGE_IRQ, \
+	  .pad_conf1 = PAD_CONFIG1_DEFAULT, \
+	  .pad_val   = PAD_VAL_INPUT, }
+
+/* Direct / dedicated IRQ input - pass signal directly to apic */
+#define GPIO_DIRQ_EDGEHIGH_PD_20K \
+	{ .pad_conf0 = PAD_PU_20K | PAD_PULL_DOWN | PAD_CONFIG0_DEFAULT \
+		     | PAD_FUNC0 | PAD_IRQ_EN | PAD_TPE_IRQ | PAD_EDGE_IRQ, \
+	  .pad_conf1 = PAD_CONFIG1_DEFAULT, \
+	  .pad_val   = PAD_VAL_INPUT, }
+
+/* Direct / dedicated IRQ input - pass signal directly to apic */
+#define GPIO_DIRQ_EDGELOW_PD_20K \
+	{ .pad_conf0 = PAD_PU_20K | PAD_PULL_DOWN | PAD_CONFIG0_DEFAULT \
+		     | PAD_FUNC0 | PAD_IRQ_EN | PAD_TNE_IRQ | PAD_EDGE_IRQ, \
+	  .pad_conf1 = PAD_CONFIG1_DEFAULT, \
+	  .pad_val   = PAD_VAL_INPUT, }
+
+/* Direct / dedicated IRQ input - pass signal directly to apic */
+#define GPIO_DIRQ_EDGEBOTH_PU_20K \
+	{ .pad_conf0 = PAD_PU_20K | PAD_PULL_UP | PAD_CONFIG0_DEFAULT \
+		     | PAD_FUNC0 | PAD_IRQ_EN | PAD_TPE_IRQ| PAD_TNE_IRQ | PAD_EDGE_IRQ, \
+	  .pad_conf1 = PAD_CONFIG1_DEFAULT, \
+	  .pad_val   = PAD_VAL_INPUT, }
 
 #define GPIO_OUT_LOW \
 	{ .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT, \