[coreboot-gerrit] Patch set updated for coreboot: 5477bd9 ipq8064: make UART driver work in bootblock

Marc Jones (marc.jones@se-eng.com) gerrit at coreboot.org
Tue Dec 30 00:58:28 CET 2014


Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7875

-gerrit

commit 5477bd9195c475f1fc7bd52f41876675cf25e8d2
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Wed Apr 23 14:26:01 2014 -0700

    ipq8064: make UART driver work in bootblock
    
    This patch it the last one in the chain adapting the ipq9064 UART
    driver for use in coreboot. A new config option
    (CONSOLE_SERIAL_IPQ806X) is being introduced to control inclusion of
    the driver.
    
    The previously introduced uart_wrapper.c is now included in the build
    to provide the console driver structure used by ramstage.
    
    Necessary configuration options are added to allow use of UART in the
    bootblock.
    
    BUG=chrome-os-partner:27784
    
    TEST=with this change the coreboot image on AP148 prints a banner on
       start up:
    
    coreboot-4.0 Wed Apr 23 16:24:51 PDT 2014 starting...
    
    Original-Change-Id: I129ee30ba17a5061b30cfee56c135df31eba98b5
    Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/196663
    (cherry picked from commit 42ca8994361327c24e7a611505b21534dd231f30)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: I1175e74ed639cdc27a1a677fba65de2dd2b13a91
---
 src/console/Makefile.inc                |  2 ++
 src/mainboard/google/storm/Kconfig      |  1 +
 src/mainboard/google/storm/Makefile.inc |  3 +++
 src/soc/qualcomm/ipq806x/Kconfig        | 11 +++++++----
 src/soc/qualcomm/ipq806x/Makefile.inc   |  3 +++
 5 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc
index d339500..51cafef 100644
--- a/src/console/Makefile.inc
+++ b/src/console/Makefile.inc
@@ -14,3 +14,5 @@ romstage-y += die.c
 bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += vtxprintf.c printk.c
 bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += init.c console.c
 bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += die.c
+
+ramstage-$(CONFIG_CONSOLE_SERIAL_IPQ806X) += uart_wrapper.c
diff --git a/src/mainboard/google/storm/Kconfig b/src/mainboard/google/storm/Kconfig
index 59c0bb6..a2bf740 100644
--- a/src/mainboard/google/storm/Kconfig
+++ b/src/mainboard/google/storm/Kconfig
@@ -23,6 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select SOC_QC_IPQ806X
 	select BOARD_ROMSIZE_KB_4096
+	select MAINBOARD_HAS_BOOTBLOCK_INIT
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/google/storm/Makefile.inc b/src/mainboard/google/storm/Makefile.inc
index e0f5501..17f9676 100644
--- a/src/mainboard/google/storm/Makefile.inc
+++ b/src/mainboard/google/storm/Makefile.inc
@@ -17,6 +17,9 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 ##
 
+bootblock-y += cdp.c
+
 romstage-y += romstage.c
 
 ramstage-y += mainboard.c
+ramstage-y += cdp.c
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index 0fb780c..92ef3a1 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -1,9 +1,12 @@
 config SOC_QC_IPQ806X
+	bool
+	default n
 	select ARCH_BOOTBLOCK_ARMV4
 	select ARCH_ROMSTAGE_ARMV7
 	select ARCH_RAMSTAGE_ARMV7
-	bool
-	default n
+	select ARM_LPAE
+	select BOOTBLOCK_CONSOLE
+	select HAVE_UART_SPECIAL
 
 if SOC_QC_IPQ806X
 
@@ -13,11 +16,11 @@ config BOOTBLOCK_ROM_OFFSET
 
 config CBFS_HEADER_ROM_OFFSET
 	hex "offset of master CBFS header in ROM"
-	default 0x221000
+	default 0x224000
 
 config CBFS_ROM_OFFSET
 	hex "offset of CBFS data in ROM"
-	default 0x221080
+	default 0x224080
 
 config MBN_ENCAPSULATION
 	depends on USE_BLOBS
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index dfbbf3d..639b9d9 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -22,16 +22,19 @@ bootblock-y += cbfs.c
 bootblock-y += clock.c
 bootblock-y += gpio.c
 bootblock-y += timer.c
+bootblock-$(CONFIG_DRIVERS_UART) += uart.c
 
 romstage-y += cbfs.c
 romstage-y += clock.c
 romstage-y += gpio.c
 romstage-y += timer.c
+romstage-$(CONFIG_DRIVERS_UART) += uart.c
 
 ramstage-y += cbfs.c
 ramstage-y += clock.c
 ramstage-y += gpio.c
 ramstage-y += timer.c
+ramstage-$(CONFIG_DRIVERS_UART) += uart.c
 
 ifeq ($(CONFIG_USE_BLOBS),y)
 



More information about the coreboot-gerrit mailing list