[coreboot-gerrit] Patch set updated for coreboot: 5803eb9 rtc: Add an RTC API, and implement it for x86.
Marc Jones (marc.jones@se-eng.com)
gerrit at coreboot.org
Tue Dec 30 05:57:03 CET 2014
Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7889
-gerrit
commit 5803eb9e7f73f16d2412bb4db37c194602ed0883
Author: Marc Jones <marc.jones at se-eng.com>
Date: Mon Dec 29 21:31:44 2014 -0700
rtc: Add an RTC API, and implement it for x86.
This CL adds an API for RTC drivers, and implements its two functions,
rtc_get and rtc_set, for x86's RTC. The function which resets the clock when the
CMOS as lost state now uses the RTC driver instead of accessing the those
registers directly.
BUG=None
TEST=Built and booted on Link with the event log code modified to use
the RTC interface. Verified that the event times were accurate.
BRANCH=nyan
Original-Change-Id: Ifa807898e583254e57167fd44932ea86627a02ee
Original-Signed-off-by: Gabe Black <gabeblack at google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/197795
Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
Original-Tested-by: Gabe Black <gabeblack at chromium.org>
Original-Commit-Queue: Gabe Black <gabeblack at chromium.org>
This is the first half of the patch.
(cherry picked from commit 9e0fd75142d29afe34f6c6b9ce0099f478ca5a93)
Signed-off-by: Marc Jones <marc.jones at se-eng.com>
Change-Id: I159f9b4872a0bb932961b4168b180c087dfb1883
---
src/drivers/pc80/Kconfig | 5 ++
src/drivers/pc80/Makefile.inc | 7 +-
src/drivers/pc80/mc146818rtc.c | 149 +++++++++++++++++++++++++++--------------
src/include/bcd.h | 35 ++++++++++
src/include/rtc.h | 37 ++++++++++
5 files changed, 179 insertions(+), 54 deletions(-)
diff --git a/src/drivers/pc80/Kconfig b/src/drivers/pc80/Kconfig
index 5fad3a5..5b05f46 100644
--- a/src/drivers/pc80/Kconfig
+++ b/src/drivers/pc80/Kconfig
@@ -22,3 +22,8 @@ config LPC_TPM
Enable this option to enable TPM support in coreboot.
If unsure, say N.
+
+config DRIVERS_MC146818
+ bool
+ default y if ARCH_X86
+ default n if !ARCH_X86
diff --git a/src/drivers/pc80/Makefile.inc b/src/drivers/pc80/Makefile.inc
index fe6d11f..2926c56 100644
--- a/src/drivers/pc80/Makefile.inc
+++ b/src/drivers/pc80/Makefile.inc
@@ -1,5 +1,5 @@
-romstage-y += mc146818rtc.c
-ramstage-y += mc146818rtc.c
+romstage-$(CONFIG_DRIVERS_MC146818) += mc146818rtc.c
+ramstage-$(CONFIG_DRIVERS_MC146818) += mc146818rtc.c
ramstage-y += isa-dma.c
ramstage-y += i8254.c
ramstage-y += i8259.c
@@ -7,7 +7,10 @@ ramstage-$(CONFIG_UDELAY_IO) += udelay_io.c
ramstage-y += keyboard.c
ramstage-$(CONFIG_SPKMODEM) += spkmodem.c
+ifeq ($(CONFIG_DRIVERS_MC146818),y)
romstage-$(CONFIG_USE_OPTION_TABLE) += mc146818rtc_early.c
+endif
+
romstage-$(CONFIG_LPC_TPM) += tpm.c
romstage-$(CONFIG_SPKMODEM) += spkmodem.c
diff --git a/src/drivers/pc80/mc146818rtc.c b/src/drivers/pc80/mc146818rtc.c
index 014a8c9..9e77bd2 100644
--- a/src/drivers/pc80/mc146818rtc.c
+++ b/src/drivers/pc80/mc146818rtc.c
@@ -1,28 +1,52 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 The Chromium OS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <bcd.h>
#include <stdint.h>
#include <version.h>
#include <console/console.h>
#include <pc80/mc146818rtc.h>
#include <boot/coreboot_tables.h>
+#include <rtc.h>
#include <string.h>
#if CONFIG_USE_OPTION_TABLE
#include "option_table.h"
#include <cbfs.h>
#endif
+#if CONFIG_HAVE_ACPI_RESUME
#include <arch/acpi.h>
+#endif
-static void cmos_update_date(u8 has_century)
+static void cmos_reset_date(u8 has_century)
{
/* Now setup a default date equals to the build date */
- cmos_write(0, RTC_CLK_SECOND);
- cmos_write(0, RTC_CLK_MINUTE);
- cmos_write(1, RTC_CLK_HOUR);
- cmos_write(coreboot_build_date.weekday + 1, RTC_CLK_DAYOFWEEK);
- cmos_write(coreboot_build_date.day, RTC_CLK_DAYOFMONTH);
- cmos_write(coreboot_build_date.month, RTC_CLK_MONTH);
- cmos_write(coreboot_build_date.year, RTC_CLK_YEAR);
- if (has_century)
- cmos_write(coreboot_build_date.century, RTC_CLK_ALTCENTURY);
+ struct rtc_time time = {
+ .sec = 0,
+ .min = 0,
+ .hour = 1,
+ .mday = bcd2bin(coreboot_build_date.day),
+ .mon = bcd2bin(coreboot_build_date.month),
+ .year = 2000 + bcd2bin(coreboot_build_date.year),
+ .wday = bcd2bin(coreboot_build_date.weekday)
+ };
+ rtc_set(&time, has_century);
}
#if CONFIG_USE_OPTION_TABLE
@@ -50,15 +74,8 @@ static void cmos_set_checksum(int range_start, int range_end, int cks_loc)
}
#endif
-#if CONFIG_ARCH_X86
#define RTC_CONTROL_DEFAULT (RTC_24H)
#define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)
-#else
-#if CONFIG_ARCH_ALPHA
-#define RTC_CONTROL_DEFAULT (RTC_SQWE | RTC_24H)
-#define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)
-#endif
-#endif
#ifndef __SMM__
void cmos_init(int invalid)
@@ -69,16 +86,15 @@ void cmos_init(int invalid)
unsigned char x;
#endif
-#ifndef __PRE_RAM__
- /*
- * Avoid clearing pending interrupts and resetting the RTC control
+#if CONFIG_HAVE_ACPI_RESUME
+ /* Avoid clearing pending interrupts and resetting the RTC control
* register in the resume path because the Linux kernel relies on
- * this to know if it should restart the RTC timer queue if the wake
+ * this to know if it should restart the RTC timerqueue if the wake
* was due to the RTC alarm.
*/
- if (acpi_is_wakeup_s3())
+ if (acpi_get_sleep_type() == 3)
return;
-#endif /* __PRE_RAM__ */
+#endif
printk(BIOS_DEBUG, "RTC Init\n");
@@ -107,7 +123,7 @@ void cmos_init(int invalid)
cmos_write(0, i);
#endif
if (cmos_invalid)
- cmos_update_date(RTC_HAS_NO_ALTCENTURY);
+ cmos_reset_date(RTC_HAS_NO_ALTCENTURY);
printk(BIOS_WARNING, "RTC:%s%s%s%s\n",
invalid?" Clear requested":"",
@@ -142,14 +158,13 @@ void cmos_init(int invalid)
#if CONFIG_USE_OPTION_TABLE
/*
- * This routine returns the value of the requested bits.
+ * This routine returns the value of the requested bits
* input bit = bit count from the beginning of the cmos image
* length = number of bits to include in the value
- * ret = a character pointer to where the value is to be returned
- * returns CB_SUCCESS = successful, cb_err code if an error occurred
+ * vret = a character pointer to where the value is to be returned
+ * returns 0 = successful, -1 = an error occurred
*/
-static enum cb_err get_cmos_value(unsigned long bit, unsigned long length,
- void *vret)
+static int get_cmos_value(unsigned long bit, unsigned long length, void *vret)
{
unsigned char *ret;
unsigned long byte,byte_bit;
@@ -174,10 +189,10 @@ static enum cb_err get_cmos_value(unsigned long bit, unsigned long length,
ret[i] = cmos_read(byte);
}
}
- return CB_SUCCESS;
+ return 0;
}
-enum cb_err get_option(void *dest, const char *name)
+int get_option(void *dest, const char *name)
{
struct cmos_option_table *ct;
struct cmos_entries *ce;
@@ -193,7 +208,7 @@ enum cb_err get_option(void *dest, const char *name)
if (!ct) {
printk(BIOS_ERR, "RTC: cmos_layout.bin could not be found. "
"Options are disabled\n");
- return CB_CMOS_LAYOUT_NOT_FOUND;
+ return -2;
}
ce = (struct cmos_entries*)((unsigned char *)ct + ct->header_length);
for(; ce->tag == LB_TAG_OPTION;
@@ -205,18 +220,18 @@ enum cb_err get_option(void *dest, const char *name)
}
if (!found) {
printk(BIOS_DEBUG, "WARNING: No CMOS option '%s'.\n", name);
- return CB_CMOS_OPTION_NOT_FOUND;
+ return -2;
}
- if (get_cmos_value(ce->bit, ce->length, dest) != CB_SUCCESS)
- return CB_CMOS_ACCESS_ERROR;
- if (!cmos_checksum_valid(LB_CKS_RANGE_START, LB_CKS_RANGE_END, LB_CKS_LOC))
- return CB_CMOS_CHECKSUM_INVALID;
- return CB_SUCCESS;
+ if (get_cmos_value(ce->bit, ce->length, dest))
+ return -3;
+ if (!cmos_checksum_valid(LB_CKS_RANGE_START, LB_CKS_RANGE_END,
+ LB_CKS_LOC))
+ return -4;
+ return 0 ;
}
-static enum cb_err set_cmos_value(unsigned long bit, unsigned long length,
- void *vret)
+static int set_cmos_value(unsigned long bit, unsigned long length, void *vret)
{
unsigned char *ret;
unsigned long byte,byte_bit;
@@ -239,7 +254,7 @@ static enum cb_err set_cmos_value(unsigned long bit, unsigned long length,
chksum_update_needed = 1;
} else { /* more that one byte so transfer the whole bytes */
if (byte_bit || length % 8)
- return CB_ERR_ARG;
+ return -1;
for (i = 0; length; i++, length -= 8, byte++)
cmos_write(ret[i], byte);
@@ -252,11 +267,11 @@ static enum cb_err set_cmos_value(unsigned long bit, unsigned long length,
cmos_set_checksum(LB_CKS_RANGE_START, LB_CKS_RANGE_END,
LB_CKS_LOC);
}
- return CB_SUCCESS;
+ return 0;
}
-enum cb_err set_option(const char *name, void *value)
+int set_option(const char *name, void *value)
{
struct cmos_option_table *ct;
struct cmos_entries *ce;
@@ -273,7 +288,7 @@ enum cb_err set_option(const char *name, void *value)
if (!ct) {
printk(BIOS_ERR, "cmos_layout.bin could not be found. "
"Options are disabled\n");
- return CB_CMOS_LAYOUT_NOT_FOUND;
+ return -2;
}
ce = (struct cmos_entries*)((unsigned char *)ct + ct->header_length);
for(; ce->tag == LB_TAG_OPTION;
@@ -285,22 +300,21 @@ enum cb_err set_option(const char *name, void *value)
}
if (!found) {
printk(BIOS_DEBUG, "WARNING: No CMOS option '%s'.\n", name);
- return CB_CMOS_OPTION_NOT_FOUND;
+ return -2;
}
length = ce->length;
if (ce->config == 's') {
length = MAX(strlen((const char *)value) * 8, ce->length - 8);
/* make sure the string is null terminated */
- if (set_cmos_value(ce->bit + ce->length - 8, 8, &(u8[]){0})
- != CB_SUCCESS)
- return (CB_CMOS_ACCESS_ERROR);
+ if ((set_cmos_value(ce->bit + ce->length - 8, 8, &(u8[]){0})))
+ return -3;
}
- if (set_cmos_value(ce->bit, length, value) != CB_SUCCESS)
- return (CB_CMOS_ACCESS_ERROR);
+ if ((set_cmos_value(ce->bit, length, value)))
+ return -3;
- return CB_SUCCESS;
+ return 0;
}
#endif /* CONFIG_USE_OPTION_TABLE */
@@ -323,5 +337,36 @@ void cmos_check_update_date(u8 has_century)
* if the date is valid.
*/
if (century > 0x99 || year > 0x99) /* Invalid date */
- cmos_update_date(has_century);
+ cmos_reset_date(has_century);
+}
+
+int rtc_set(const struct rtc_time *time, u8 has_century)
+{
+ cmos_write(bin2bcd(time->sec), RTC_CLK_SECOND);
+ cmos_write(bin2bcd(time->min), RTC_CLK_MINUTE);
+ cmos_write(bin2bcd(time->hour), RTC_CLK_HOUR);
+ cmos_write(bin2bcd(time->mday), RTC_CLK_DAYOFMONTH);
+ cmos_write(bin2bcd(time->mon), RTC_CLK_MONTH);
+ cmos_write(bin2bcd(time->year % 100), RTC_CLK_YEAR);
+ if (has_century)
+ cmos_write(bin2bcd(time->year / 100),
+ RTC_CLK_ALTCENTURY);
+ cmos_write(bin2bcd(time->wday + 1), RTC_CLK_DAYOFWEEK);
+ return 0;
+}
+
+int rtc_get(struct rtc_time *time, u8 has_century)
+{
+ time->sec = bcd2bin(cmos_read(RTC_CLK_SECOND));
+ time->min = bcd2bin(cmos_read(RTC_CLK_MINUTE));
+ time->hour = bcd2bin(cmos_read(RTC_CLK_HOUR));
+ time->mday = bcd2bin(cmos_read(RTC_CLK_DAYOFMONTH));
+ time->mon = bcd2bin(cmos_read(RTC_CLK_MONTH));
+ time->year = bcd2bin(cmos_read(RTC_CLK_YEAR));
+ if (has_century)
+ time->year += bcd2bin(cmos_read(RTC_CLK_ALTCENTURY)) * 100;
+ else
+ time->year += 2000;
+ time->wday = bcd2bin(cmos_read(RTC_CLK_DAYOFWEEK)) - 1;
+ return 0;
}
diff --git a/src/include/bcd.h b/src/include/bcd.h
new file mode 100644
index 0000000..a085027
--- /dev/null
+++ b/src/include/bcd.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ */
+
+#ifndef _BCD_H_
+#define _BCD_H_
+
+#include <stdint.h>
+
+static inline uint8_t bcd2bin(uint8_t val)
+{
+ return ((val >> 4) & 0xf) * 10 + (val & 0xf);
+}
+
+static inline uint8_t bin2bcd(uint8_t val)
+{
+ return ((val / 10) << 4) | (val % 10);
+}
+
+#endif /* _BCD_H_ */
diff --git a/src/include/rtc.h b/src/include/rtc.h
new file mode 100644
index 0000000..ed32b69
--- /dev/null
+++ b/src/include/rtc.h
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ */
+
+#ifndef _RTC_H_
+#define _RTC_H_
+
+struct rtc_time
+{
+ int sec;
+ int min;
+ int hour;
+ int mday;
+ int mon;
+ int year;
+ int wday;
+};
+
+int rtc_set(const struct rtc_time *time, u8 has_century);
+int rtc_get(struct rtc_time *time, u8 has_century);
+
+#endif /* _RTC_H_ */
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