[coreboot-gerrit] Patch merged into coreboot/master: dffd892 ipq8064: modify SPI controller driver to work in coreboot

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit dffd892e47bb8bbfb920447275a2d6b00be904ce
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Wed Apr 30 13:25:12 2014 -0700

    ipq8064: modify SPI controller driver to work in coreboot
    
    A typical SPI operation consists of two phases - command and data
    transfers. Command transfer is always from the host to the chip (i.e.
    is going in the 'write' direction), data transfer could be either read
    or write.
    
    We don't want the receive FIFO to be operating while the command phase
    is in progress. A simple way to keep the receive FIFO shut down is to
    not to enable it until the command phase is completed.
    
    Selective control of the receive FIFO allows to consolidate the
    receive and transmit functions in a single spi_xfer() function, as it
    happens in other SPI controller drivers.
    
    The FIFO FULL and FIFO NOT EMPTY conditions are used to decide if the
    next byte can be written or received, respectively. While data is
    being received the 0xFF bytes are transmitted per each received byte,
    to keep the SPI bus clocking.
    
    The data structure describing the three GSBI ports is moved from the
    .h file into .c file. A version of the clrsetbits macro is added to
    work with integer addresses instead of pointers.
    
    BUG=chrome-os-partner:27784
    TEST=not yet, but with the res of the changes the bootblock loads and
         starts the rombase section successfully.
    
    Original-Change-Id: I78cd0054f1a8f5e1d7213f38ef8de31486238aba
    Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/197779
    Original-Reviewed-by: Stefan Reinauer <reinauer at chromium.org>
    Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
    (cherry picked from commit c101ae306d182bbe14935ee139a25968388d745a)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: I7f3fd0524ec6c10008ff514e8a8f1d14a700732f
    Reviewed-on: http://review.coreboot.org/7983
    Reviewed-by: David Hendricks <dhendrix at chromium.org>
    Tested-by: build bot (Jenkins)


See http://review.coreboot.org/7983 for details.

-gerrit