[coreboot-gerrit] Patch set updated for coreboot: fee54bb usbdebug: Remove duplicate port claim

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4709

-gerrit

commit fee54bbb5faa59428cc0cca24961f5e343bc951c
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Sat Jan 18 12:26:13 2014 +0200

    usbdebug: Remove duplicate port claim
    
    This claim is useless when done before EHCI controller reset. Code in
    usbdebug_init_() already sets this properly after reset, see use of
    DBGP_OWNER.
    
    Change-Id: Ic17493fe4edbbbed6ebcbef35a264fbf188f1fba
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/southbridge/intel/common/usb_debug.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/src/southbridge/intel/common/usb_debug.c b/src/southbridge/intel/common/usb_debug.c
index fecd716..d18cb0f 100644
--- a/src/southbridge/intel/common/usb_debug.c
+++ b/src/southbridge/intel/common/usb_debug.c
@@ -64,8 +64,6 @@ void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
 
 void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base)
 {
-	u32 dbgctl;
-
 	/* Bail out. No console to complain in. */
 	if (!dev)
 		return;
@@ -75,9 +73,4 @@ void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base)
 
 	/* Enable access to the EHCI memory space registers. */
 	pci_write_config8(dev, PCI_COMMAND, PCI_COMMAND_MEMORY);
-
-	/* Force ownership of the Debug Port to the EHCI controller. */
-	dbgctl = read32(base + CONFIG_EHCI_DEBUG_OFFSET);
-	dbgctl |= (1 << 30);
-	write32(base + CONFIG_EHCI_DEBUG_OFFSET, dbgctl);
 }