[coreboot-gerrit] New patch to review for coreboot: 9127a78 lenovo/x201: Enable flash prefetching.
Vladimir Serbinenko (phcoder@gmail.com)
gerrit at coreboot.org
Wed Feb 5 19:11:12 CET 2014
Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5145
-gerrit
commit 9127a780c425f0cf42ef3ebc7ce575e5d3a666b7
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date: Wed Feb 5 19:10:03 2014 +0100
lenovo/x201: Enable flash prefetching.
Speeds up coreboot and especially payload load.
Before:
90:load payload 4,530,979 (17,728)
99:selfboot jump 5,103,408 (572,429)
After:
90:load payload 4,390,051 (14,849)
99:selfboot jump 4,505,966 (115,915)
Change-Id: I45c3042594cda16ab3adde6472e00ec1b2d2a688
Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
src/mainboard/lenovo/x201/romstage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index e3e0a62..f0874d3 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -63,7 +63,7 @@ static void pch_enable_lpc(void)
pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10);
pci_write_config32(PCH_LPC_DEV, 0xd0, 0x0);
- pci_write_config32(PCH_LPC_DEV, 0xdc, 0x0);
+ pci_write_config32(PCH_LPC_DEV, 0xdc, 0x8);
pci_write_config8(PCH_LPC_DEV, GEN_PMCON_3,
(pci_read_config8(PCH_LPC_DEV, GEN_PMCON_3) & ~2) | 1);
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