[coreboot-gerrit] Patch set updated for coreboot: 69a03bc uart8250mem: Unify calls with generic UART

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Sun Feb 16 07:46:35 CET 2014


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5235

-gerrit

commit 69a03bc7d9ac0b32ce7b30c675cb29486d395aaa
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Sat Feb 15 10:19:23 2014 +0200

    uart8250mem: Unify calls with generic UART
    
    Change-Id: I79f2ca8427a33a3c719adfe277c24dab79a33ef3
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/arch/x86/lib/romstage_console.c      | 11 +---
 src/console/uart8250mem_console.c        | 30 +++--------
 src/drivers/oxford/oxpcie/oxpcie.c       |  3 +-
 src/drivers/oxford/oxpcie/oxpcie_early.c | 49 ++++++++++++++----
 src/include/console/uart.h               |  5 +-
 src/include/uart8250.h                   | 50 ------------------
 src/lib/uart8250mem.c                    | 87 ++++++++++++++++----------------
 7 files changed, 96 insertions(+), 139 deletions(-)

diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c
index 89d7f82..6566b2f 100644
--- a/src/arch/x86/lib/romstage_console.c
+++ b/src/arch/x86/lib/romstage_console.c
@@ -26,20 +26,13 @@
 #include <console/spkmodem.h>
 #include <console/vtxprintf.h>
 
-#if CONFIG_CONSOLE_SERIAL8250MEM
-#include <uart8250.h>
-#endif
-
 void console_tx_byte(unsigned char byte)
 {
 	if (byte == '\n')
 		console_tx_byte('\r');
 
 #if CONFIG_CONSOLE_SERIAL8250MEM
-	if (oxford_oxpcie_present) {
-		uart8250_mem_tx_byte(
-			CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000, byte);
-	}
+	uart_tx_byte(byte);
 #endif
 #if CONFIG_CONSOLE_SERIAL8250
 	uart_tx_byte(byte);
@@ -61,7 +54,7 @@ void console_tx_byte(unsigned char byte)
 void console_tx_flush(void)
 {
 #if CONFIG_CONSOLE_SERIAL8250MEM
-	uart8250_mem_tx_flush(CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000);
+	uart_tx_flush();
 #endif
 #if CONFIG_CONSOLE_SERIAL8250
 	uart_tx_flush();
diff --git a/src/console/uart8250mem_console.c b/src/console/uart8250mem_console.c
index 3833e47..7e52aed 100644
--- a/src/console/uart8250mem_console.c
+++ b/src/console/uart8250mem_console.c
@@ -18,47 +18,31 @@
  */
 
 #include <console/console.h>
-#include <uart8250.h>
+#include <console/uart.h>
 
-static u32 uart_bar = 0;
-
-void uartmem_init(void)
-{
-	uart_bar = uart_mem_init();
-}
-
-u32 uartmem_getbaseaddr(void)
+static void uartmem_init(void)
 {
-	return uart_bar;
+	uart_init();
 }
 
 static void uartmem_tx_byte(unsigned char data)
 {
-	if (!uart_bar)
-		return;
-
-	uart8250_mem_tx_byte(uart_bar, data);
+	uart_tx_byte(data);
 }
 
 static void uartmem_tx_flush(void)
 {
-	uart8250_mem_tx_flush(uart_bar);
+	uart_tx_flush();
 }
 
 static unsigned char uartmem_rx_byte(void)
 {
-	if (!uart_bar)
-		return 0;
-
-	return uart8250_mem_rx_byte(uart_bar);
+	return uart_rx_byte();
 }
 
 static int uartmem_tst_byte(void)
 {
-	if (!uart_bar)
-		return 0;
-
-	return uart8250_mem_can_rx_byte(uart_bar);
+	return uart_can_rx_byte();
 }
 
 static const struct console_driver uart8250mem_console __console = {
diff --git a/src/drivers/oxford/oxpcie/oxpcie.c b/src/drivers/oxford/oxpcie/oxpcie.c
index f719fc7..0b9081f 100644
--- a/src/drivers/oxford/oxpcie/oxpcie.c
+++ b/src/drivers/oxford/oxpcie/oxpcie.c
@@ -48,7 +48,8 @@ static void oxford_oxpcie_set_resources(struct device *dev)
 
 #if CONFIG_CONSOLE_SERIAL8250MEM
 	/* Re-initialize OXPCIe base address after set_resources */
-	uartmem_init();
+	u32 mmio_base = pci_read_config32(device, PCI_BASE_ADDRESS_0);
+	oxford_remap(mmio_base & ~0xf);
 #endif
 }
 
diff --git a/src/drivers/oxford/oxpcie/oxpcie_early.c b/src/drivers/oxford/oxpcie/oxpcie_early.c
index 693c1e9..b60cd6c 100644
--- a/src/drivers/oxford/oxpcie/oxpcie_early.c
+++ b/src/drivers/oxford/oxpcie/oxpcie_early.c
@@ -18,12 +18,17 @@
  */
 
 #include <stdint.h>
+#include <stddef.h>
 #include <arch/io.h>
 #include <arch/early_variables.h>
 #include <delay.h>
-#include <uart8250.h>
+#include <console/uart.h>
 #include <device/pci_def.h>
 
+static unsigned int oxpcie_present CAR_GLOBAL;
+static ROMSTAGE_CONST u32 uart0_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000;
+static ROMSTAGE_CONST u32 uart1_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000;
+
 #define PCIE_BRIDGE \
 	PCI_DEV(CONFIG_OXFORD_OXPCIE_BRIDGE_BUS, \
 		CONFIG_OXFORD_OXPCIE_BRIDGE_DEVICE, \
@@ -35,13 +40,9 @@
 #define OXPCIE_DEVICE_3 \
 	PCI_DEV(CONFIG_OXFORD_OXPCIE_BRIDGE_SUBORDINATE, 0, 3)
 
-#if defined(__PRE_RAM__)
-int oxford_oxpcie_present CAR_GLOBAL;
-
-void oxford_init(void)
+static void oxpcie_init_bridge(void)
 {
 	u16 reg16;
-	oxford_oxpcie_present = 1;
 
 	/* First we reset the secondary bus */
 	reg16 = pci_read_config16(PCIE_BRIDGE, PCI_BRIDGE_CONTROL);
@@ -100,7 +101,6 @@ void oxford_init(void)
 		break;
 	default:
 		/* No UART here. */
-		oxford_oxpcie_present = 0;
 		return;
 	}
 
@@ -113,16 +113,43 @@ void oxford_init(void)
 	reg16 |= PCI_COMMAND_MEMORY;
 	pci_write_config16(device, PCI_COMMAND, reg16);
 
-	/* Now the UART initialization */
-	u32 uart0_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000;
+	car_set_var(oxpcie_present, 1);
+}
 
-	unsigned div = uart_platform_divisor();
-	uart8250_mem_init(uart0_base, div);
+static int oxpcie_uart_active(void)
+{
+	return (car_get_var(oxpcie_present));
 }
 
+#ifndef __PRE_RAM__
+void oxford_remap(u32 new_base)
+{
+	uart0_base = new_base + 0x1000;
+	uart1_base = new_base + 0x2000;
+}
 #endif
 
+unsigned uart_platform_base(int idx)
+{
+	if (idx == 0 && oxpcie_uart_active())
+		return uart0_base;
+	if (idx == 1 && oxpcie_uart_active())
+		return uart1_base;
+	return 0;
+}
+
 unsigned uart_platform_divisor(void)
 {
 	return uart_divisor(4000000);
 }
+
+uint32_t uartmem_getbaseaddr(void)
+{
+	return uart_platform_base(0);
+}
+
+void oxford_init(void)
+{
+	oxpcie_init_bridge();
+	uart_init();
+}
diff --git a/src/include/console/uart.h b/src/include/console/uart.h
index ac4455a..5ac7fda 100644
--- a/src/include/console/uart.h
+++ b/src/include/console/uart.h
@@ -30,7 +30,10 @@ int uart_can_rx_byte(void);
 unsigned uart_divisor(unsigned basefreq);
 unsigned uart_platform_divisor(void);
 
-
+unsigned uart_platform_base(int idx);
 uint32_t uartmem_getbaseaddr(void);
 
+void oxford_init(void);
+void oxford_remap(u32 new_base);
+
 #endif /* CONSOLE_UART_H */
diff --git a/src/include/uart8250.h b/src/include/uart8250.h
deleted file mode 100644
index 4d7ebcc..0000000
--- a/src/include/uart8250.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2003 Eric Biederman
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef UART8250_H
-#define UART8250_H
-
-#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM
-
-#if ((115200 % CONFIG_TTYS0_BAUD) != 0)
-#error Bad ttyS0 baud rate
-#endif
-
-#if CONFIG_CONSOLE_SERIAL8250MEM
-void uartmem_init(void);
-
-/* and the same for memory mapped uarts */
-unsigned char uart8250_mem_rx_byte(unsigned base_port);
-int uart8250_mem_can_rx_byte(unsigned base_port);
-void uart8250_mem_tx_byte(unsigned base_port, unsigned char data);
-void uart8250_mem_tx_flush(unsigned base_port);
-void uart8250_mem_init(unsigned base_port, unsigned divisor);
-u32 uart_mem_init(void);
-
-#if defined(__PRE_RAM__) && CONFIG_DRIVERS_OXFORD_OXPCIE
-/* and special init for OXPCIe based cards */
-extern int oxford_oxpcie_present;
-#endif
-#endif
-
-#endif /* CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM */
-
-#include <console/uart.h>
-
-#endif /* UART8250_H */
diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c
index cff67d7..029d055 100644
--- a/src/lib/uart8250mem.c
+++ b/src/lib/uart8250mem.c
@@ -19,8 +19,7 @@
  */
 
 #include <arch/io.h>
-#include <uart8250.h>
-#include <device/device.h>
+#include <console/uart.h>
 #include <delay.h>
 #include "drivers/uart/uart8250reg.h"
 
@@ -33,42 +32,32 @@
 #define SINGLE_CHAR_TIMEOUT	(50 * 1000)
 #define FIFO_TIMEOUT		(16 * SINGLE_CHAR_TIMEOUT)
 
-static inline int uart8250_mem_can_tx_byte(unsigned base_port)
+static int uart8250_mem_can_tx_byte(unsigned base_port)
 {
 	return read8(base_port + UART_LSR) & UART_LSR_THRE;
 }
 
-static inline void uart8250_mem_wait_to_tx_byte(unsigned base_port)
+static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data)
 {
 	unsigned long int i = SINGLE_CHAR_TIMEOUT;
 	while(i-- && !uart8250_mem_can_tx_byte(base_port))
 		udelay(1);
+	write8(base_port + UART_TBR, data);
 }
 
-static inline void uart8250_mem_wait_until_sent(unsigned base_port)
+static void uart8250_mem_tx_flush(unsigned base_port)
 {
 	unsigned long int i = FIFO_TIMEOUT;
 	while(i-- && !(read8(base_port + UART_LSR) & UART_LSR_TEMT))
 		udelay(1);
 }
 
-void uart8250_mem_tx_byte(unsigned base_port, unsigned char data)
-{
-	uart8250_mem_wait_to_tx_byte(base_port);
-	write8(base_port + UART_TBR, data);
-}
-
-void uart8250_mem_tx_flush(unsigned base_port)
-{
-	uart8250_mem_wait_until_sent(base_port);
-}
-
-int uart8250_mem_can_rx_byte(unsigned base_port)
+static int uart8250_mem_can_rx_byte(unsigned base_port)
 {
 	return read8(base_port + UART_LSR) & UART_LSR_DR;
 }
 
-unsigned char uart8250_mem_rx_byte(unsigned base_port)
+static unsigned char uart8250_mem_rx_byte(unsigned base_port)
 {
 	unsigned long int i = SINGLE_CHAR_TIMEOUT;
 	while(i-- && !uart8250_mem_can_rx_byte(base_port))
@@ -79,7 +68,7 @@ unsigned char uart8250_mem_rx_byte(unsigned base_port)
 		return 0x0;
 }
 
-void uart8250_mem_init(unsigned base_port, unsigned divisor)
+static void uart8250_mem_init(unsigned base_port, unsigned divisor)
 {
 	/* Disable interrupts */
 	write8(base_port + UART_IER, 0x0);
@@ -100,35 +89,45 @@ void uart8250_mem_init(unsigned base_port, unsigned divisor)
 	write8(base_port + UART_LCR, CONFIG_TTYS0_LCS);
 }
 
-u32 uart_mem_init(void)
-{
-	u32 uart_bar = 0;
-	unsigned div = uart_platform_divisor();
 
-	/* Now find the UART base address and calculate the divisor */
-#if CONFIG_DRIVERS_OXFORD_OXPCIE
-#if defined(MORE_TESTING) && !defined(__SIMPLE_DEVICE__)
-	device_t dev = dev_find_device(0x1415, 0xc158, NULL);
-	if (!dev)
-		dev = dev_find_device(0x1415, 0xc11b, NULL);
+void uart_init(void)
+{
+	u32 base = uart_platform_base(0);
+	if (!base)
+		return;
 
-	if (dev) {
-		struct resource *res = find_resource(dev, 0x10);
+	unsigned div = uart_platform_divisor();
+	uart8250_mem_init(base, div);
+}
 
-		if (res) {
-			uart_bar = res->base + 0x1000; // for 1st UART
-			// uart_bar = res->base + 0x2000; // for 2nd UART
-		}
-	}
+void uart_tx_byte(unsigned char data)
+{
+	u32 base = uart_platform_base(0);
+	if (!base)
+		return;
+	uart8250_mem_tx_byte(base, data);
+}
 
-	if (!uart_bar)
-#endif
-	uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; // 1st UART
-	// uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000; // 2nd UART
-#endif
+unsigned char uart_rx_byte(void)
+{
+	u32 base = uart_platform_base(0);
+	if (!base)
+		return 0xff;
+	return uart8250_mem_rx_byte(base);
+}
 
-	if (uart_bar)
-		uart8250_mem_init(uart_bar, div);
+int uart_can_rx_byte(void)
+{
+	u32 base = uart_platform_base(0);
+	if (!base)
+		return 0;
+	return uart8250_mem_can_rx_byte(base);
+}
 
-	return uart_bar;
+void uart_tx_flush(void)
+{
+	u32 base = uart_platform_base(0);
+	if (!base)
+		return;
+	uart8250_mem_tx_flush(base);
 }



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