[coreboot-gerrit] Patch set updated for coreboot: 91dfb83 NOTFORMERGE: x60gfx: step 1

Vladimir Serbinenko (phcoder@gmail.com) gerrit at coreboot.org
Sun Feb 23 16:20:45 CET 2014


Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5287

-gerrit

commit 91dfb8317bbb1454a461058b840595ef0deb6bcb
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Sun Feb 23 14:17:03 2014 +0100

    NOTFORMERGE: x60gfx: step 1
    
    Change-Id: I91c5619d7c2a212a55e301733374de8b23f8aa1f
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 src/drivers/intel/gma/edid.c     |  4 ++--
 src/mainboard/lenovo/x60/Kconfig |  1 +
 src/mainboard/lenovo/x60/i915.c  | 18 +++++-------------
 src/northbridge/intel/i945/gma.c |  2 +-
 4 files changed, 9 insertions(+), 16 deletions(-)

diff --git a/src/drivers/intel/gma/edid.c b/src/drivers/intel/gma/edid.c
index 0066b6a..bb6cba8 100644
--- a/src/drivers/intel/gma/edid.c
+++ b/src/drivers/intel/gma/edid.c
@@ -49,11 +49,11 @@ intel_gmbus_read_edid(u32 mmio, u8 bus, u8 slave, u8 *edid)
 	wait_rdy(mmio);
 	/* Ensure index bits are disabled.  */
 	write32(mmio + PCH_GMBUS5, 0);
-	write32(mmio + PCH_GMBUS1, 0x46000000 | (slave << 1));
+	write32(mmio + PCH_GMBUS1, 0x46000000 | 0x10000 | (slave << 1));
 	wait_rdy(mmio);
 	/* Ensure index bits are disabled.  */
 	write32(mmio + PCH_GMBUS5, 0);
-	write32(mmio + PCH_GMBUS1, 0x4a800001 | (slave << 1));
+	write32(mmio + PCH_GMBUS1, 0x46800001 | (slave << 1));
 	for (i = 0; i < 128 / 4; i++) {
 		u32 reg32;
 		wait_rdy(mmio);
diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig
index 7ed2665..977d9e5 100644
--- a/src/mainboard/lenovo/x60/Kconfig
+++ b/src/mainboard/lenovo/x60/Kconfig
@@ -26,6 +26,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select MAINBOARD_HAS_NATIVE_VGA_INIT
 	select EARLY_CBMEM_INIT
 	select H8_DOCK_EARLY_INIT
+	select INTEL_EDID
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/lenovo/x60/i915.c b/src/mainboard/lenovo/x60/i915.c
index 4870fd8..d420cb8 100644
--- a/src/mainboard/lenovo/x60/i915.c
+++ b/src/mainboard/lenovo/x60/i915.c
@@ -43,6 +43,7 @@
 #include <cpu/x86/msr.h>
 #include <edid.h>
 #include "i915io.h"
+#include <drivers/intel/gma/edid.h>
 
 enum {
 	vmsg = 1, vio = 2, vspin = 4,
@@ -64,16 +65,6 @@ static unsigned int physbase;
 
 static u32 htotal, hblank, hsync, vtotal, vblank, vsync;
 
-const u8 x60_edid_data[] = {
-	0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0xae, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x0f, 0x01, 0x03, 0x80, 0x19, 0x12, 0x78, 0xea, 0xed, 0x75, 0x91, 0x57, 0x4f, 0x8b, 0x26,
-	0x21, 0x50, 0x54, 0x21, 0x08, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
-	0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x28, 0x15, 0x00, 0x40, 0x41, 0x00, 0x26, 0x30, 0x18, 0x88,
-	0x36, 0x00, 0xf6, 0xb9, 0x00, 0x00, 0x00, 0x18, 0xed, 0x10, 0x00, 0x40, 0x41, 0x00, 0x26, 0x30,
-	0x18, 0x88, 0x36, 0x00, 0xf6, 0xb9, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x61,
-	0x43, 0x32, 0x61, 0x43, 0x28, 0x0f, 0x01, 0x00, 0x4c, 0xa3, 0x58, 0x4a, 0x00, 0x00, 0x00, 0xfe,
-	0x00, 0x4c, 0x54, 0x4e, 0x31, 0x32, 0x31, 0x58, 0x4a, 0x2d, 0x4c, 0x30, 0x37, 0x0a, 0x00, 0x00,
-};
 #define READ32(addr) io_i915_READ32(addr)
 #define WRITE32(val, addr) io_i915_WRITE32(val, addr)
 
@@ -278,7 +269,8 @@ int i915lightup(unsigned int physbase, unsigned int iobase, unsigned int mmio,
 int i915lightup(unsigned int pphysbase, unsigned int piobase,
 		unsigned int pmmio, unsigned int pgfx)
 {
-	static struct edid edid;
+	struct edid edid;
+	u8 x60_edid_data[256];
 
 	int index;
 	unsigned long temp;
@@ -292,8 +284,8 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase,
 		(void *)graphics, mmio, addrport, physbase);
 	globalstart = rdtscll();
 
-
-	decode_edid((unsigned char *)&x60_edid_data,
+	intel_gmbus_read_edid(pmmio, 3, 0x50, x60_edid_data);
+	decode_edid(x60_edid_data,
 		    sizeof(x60_edid_data), &edid);
 
 	htotal = (edid.ha - 1) | ((edid.ha + edid.hbl - 1) << 16);
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index 433152c..9240686 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -92,7 +92,7 @@ static void gma_func1_init(struct device *dev)
 	/* IGD needs to be Bus Master, also enable IO accesss */
 	reg32 = pci_read_config32(dev, PCI_COMMAND);
 	pci_write_config32(dev, PCI_COMMAND, reg32 |
-			PCI_COMMAND_MASTER | PCI_COMMAND_IO);
+			PCI_COMMAND_MASTER | PCI_COMMAND_MEM | PCI_COMMAND_IO);
 
 	if (get_option(&val, "tft_brightness") == CB_SUCCESS)
 		pci_write_config8(dev, 0xf4, val);



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