[coreboot-gerrit] Patch merged into coreboot/master: 631312a baytrail: add support for disabling south cluster pci devices

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 631312a2ea9256d793aa005a025eb7bf40bf1e27
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Tue Oct 29 16:37:10 2013 -0500

    baytrail: add support for disabling south cluster pci devices
    
    When the southcluster pci devices are listed in the devicetree add
    the ability to perform the proper disabling sequence for turning
    off devices. This only turns off the pci device interface as well
    as put the device into D3Hot. It is not yet known how to put the TXE
    device into D3Hot so it's currently not possible to disable that
    device.
    
    Also, expose the southcluster_enable_dev() function so that other
    devices can call this if they require doing specific things before
    disabling the device. The southcluster_enable_dev() is only called
    on devices found in the devicetree and if they currently have no
    ops associated with them.
    
    BUG=chrome-os-partner:22871
    BRANCH=None
    TEST=Built and booted through depthcharge. Interrogated
         output to ensure devices were being properly disabled.
    
    Change-Id: I537ddcb9379907af2fe012948542b6150a8bf7c5
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://chromium-review.googlesource.com/174644
    Reviewed-by: Duncan Laurie <dlaurie at chromium.org>


See http://review.coreboot.org/4911 for details.

-gerrit