[coreboot-gerrit] Patch set updated for coreboot: 3ac6467 ibexpeak: Fix timings for IDE mode.
Vladimir Serbinenko (phcoder@gmail.com)
gerrit at coreboot.org
Sat Jan 11 07:51:47 CET 2014
Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4657
-gerrit
commit 3ac6467b73cbf9494bd593310d93b2b9ec4369d0
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date: Sat Jan 11 03:40:08 2014 +0100
ibexpeak: Fix timings for IDE mode.
Change-Id: I3c89bb633c32a2c2db349cb4fcbe1ed1c8deb5af
Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
src/southbridge/intel/ibexpeak/sata.c | 23 +++++++++--------------
1 file changed, 9 insertions(+), 14 deletions(-)
diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c
index 9f96d49..d30fae2 100644
--- a/src/southbridge/intel/ibexpeak/sata.c
+++ b/src/southbridge/intel/ibexpeak/sata.c
@@ -75,16 +75,14 @@ static void sata_init(struct device *dev)
pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE |
IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS);
pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE |
- IDE_ISP_3_CLOCKS | IDE_RCT_1_CLOCKS |
- IDE_PPE0 | IDE_IE0 | IDE_TIME0);
+ IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS);
/* Sync DMA */
- pci_write_config16(dev, IDE_SDMA_CNT, IDE_SSDE0);
- pci_write_config16(dev, IDE_SDMA_TIM, 0x0200);
+ pci_write_config16(dev, IDE_SDMA_CNT, 0);
+ pci_write_config16(dev, IDE_SDMA_TIM, 0);
/* Set IDE I/O Configuration */
- reg32 =
- SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
+ reg32 = SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
pci_write_config32(dev, IDE_CONFIG, reg32);
/* Port enable */
@@ -181,19 +179,16 @@ static void sata_init(struct device *dev)
/* Set timings */
pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE |
- IDE_ISP_3_CLOCKS | IDE_RCT_1_CLOCKS |
- IDE_PPE0 | IDE_IE0 | IDE_TIME0);
+ IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS);
pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE |
- IDE_SITRE | IDE_ISP_3_CLOCKS |
- IDE_RCT_1_CLOCKS | IDE_IE0 | IDE_TIME0);
+ IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS);
/* Sync DMA */
- pci_write_config16(dev, IDE_SDMA_CNT, IDE_SSDE0 | IDE_PSDE0);
- pci_write_config16(dev, IDE_SDMA_TIM, 0x0201);
+ pci_write_config16(dev, IDE_SDMA_CNT, 0);
+ pci_write_config16(dev, IDE_SDMA_TIM, 0);
/* Set IDE I/O Configuration */
- reg32 =
- SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
+ reg32 = SIG_MODE_PRI_NORMAL;
pci_write_config32(dev, IDE_CONFIG, reg32);
/* Port enable */
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