[coreboot-gerrit] New patch to review for coreboot: aaea690 AMD (non-AGESA): Common header for CAR setup

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Sun Jan 12 23:28:37 CET 2014


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4683

-gerrit

commit aaea690053e90ae89028a6af018dc1a781985a13
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Mon Dec 30 10:11:33 2013 +0200

    AMD (non-AGESA): Common header for CAR setup
    
    Change-Id: I24b2cbd671ac3a463562d284f06258140a019a37
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/cpu/amd/car/post_cache_as_ram.c             |  6 +-----
 src/include/cpu/amd/car.h                       | 18 ++++++++++++++++++
 src/include/lib.h                               |  8 --------
 src/mainboard/digitallogic/msm800sev/romstage.c |  2 +-
 src/mainboard/pcengines/alix1c/romstage.c       |  2 +-
 src/mainboard/pcengines/alix2d/romstage.c       |  2 +-
 6 files changed, 22 insertions(+), 16 deletions(-)

diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 81175da..1669da7 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -5,6 +5,7 @@
 #include <arch/stages.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/amd/mtrr.h>
+#include <cpu/amd/car.h>
 #include "cbmem.h"
 #include "cpu/amd/car/disable_cache_as_ram.c"
 
@@ -75,8 +76,6 @@ static void vErrata343(void)
 #endif
 }
 
-void cache_as_ram_switch_stack(void *resume_backup_memory);
-
 void post_cache_as_ram(void)
 {
 	void *resume_backup_memory = NULL;
@@ -113,9 +112,6 @@ void post_cache_as_ram(void)
 }
 
 void
-cache_as_ram_new_stack (void *resume_backup_memory);
-
-void
 cache_as_ram_new_stack (void *resume_backup_memory __attribute__ ((unused)))
 {
 	/* We can put data to stack again */
diff --git a/src/include/cpu/amd/car.h b/src/include/cpu/amd/car.h
new file mode 100644
index 0000000..4bc7a03
--- /dev/null
+++ b/src/include/cpu/amd/car.h
@@ -0,0 +1,18 @@
+#ifndef _CPU_AMD_CAR_H
+#define _CPU_AMD_CAR_H
+
+#if CONFIG_CPU_AMD_GEODE_LX
+void done_cache_as_ram_main(void);
+#endif
+
+#if !(CONFIG_CPU_AMD_GEODE_LX || CONFIG_CPU_AMD_GEODE_GX1 || CONFIG_CPU_AMD_GEODE_GX2)
+void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
+#endif
+
+#if CONFIG_CPU_AMD_MODEL_FXX || CONFIG_CPU_AMD_MODEL_10XXX
+void cache_as_ram_switch_stack(void *resume_backup_memory);
+void cache_as_ram_new_stack(void *resume_backup_memory);
+void post_cache_as_ram(void);
+#endif
+
+#endif
diff --git a/src/include/lib.h b/src/include/lib.h
index 5fc390a..4fa9425 100644
--- a/src/include/lib.h
+++ b/src/include/lib.h
@@ -48,14 +48,6 @@ int checkstack(void *top_of_stack, int core);
 extern unsigned char _estack[];
 #endif
 
-/* Defined in romstage.c */
-#if CONFIG_CPU_AMD_GEODE_LX
-void cache_as_ram_main(void);
-#else
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
-#endif
-void post_cache_as_ram(void);
-
 /* Defined in src/lib/hexdump.c */
 void hexdump(unsigned long memory, int length);
 
diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c
index cc2fc4b..b96f8ae 100644
--- a/src/mainboard/digitallogic/msm800sev/romstage.c
+++ b/src/mainboard/digitallogic/msm800sev/romstage.c
@@ -8,6 +8,7 @@
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"
 #include <cpu/amd/lxdef.h>
+#include <cpu/amd/car.h>
 #include "southbridge/amd/cs5536/cs5536.h"
 #include <spd.h>
 #include "southbridge/amd/cs5536/early_smbus.c"
@@ -75,6 +76,5 @@ void main(unsigned long bist)
 	/* we are finding the return does not work on this board. Explicitly call the label that is
 	 * after the call to us. This is gross, but sometimes at this level it is the only way out
 	 */
-	void done_cache_as_ram_main(void);
 	done_cache_as_ram_main();
 }
diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c
index c3f964d..1c4ae09 100644
--- a/src/mainboard/pcengines/alix1c/romstage.c
+++ b/src/mainboard/pcengines/alix1c/romstage.c
@@ -29,6 +29,7 @@
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"
 #include <cpu/amd/lxdef.h>
+#include <cpu/amd/car.h>
 #include "southbridge/amd/cs5536/cs5536.h"
 #include "northbridge/amd/lx/raminit.h"
 
@@ -162,6 +163,5 @@ void main(unsigned long bist)
 	 * call the label that is after the call to us. This is gross, but
 	 * sometimes at this level it is the only way out.
 	 */
-	void done_cache_as_ram_main(void);
 	done_cache_as_ram_main();
 }
diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c
index 6946900..18453ac 100644
--- a/src/mainboard/pcengines/alix2d/romstage.c
+++ b/src/mainboard/pcengines/alix2d/romstage.c
@@ -29,6 +29,7 @@
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"
 #include <cpu/amd/lxdef.h>
+#include <cpu/amd/car.h>
 #include "southbridge/amd/cs5536/cs5536.h"
 #include "northbridge/amd/lx/raminit.h"
 
@@ -186,6 +187,5 @@ void main(unsigned long bist)
 	 * call the label that is after the call to us. This is gross, but
 	 * sometimes at this level it is the only way out.
 	 */
-	void done_cache_as_ram_main(void);
 	done_cache_as_ram_main();
 }



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