[coreboot-gerrit] New patch to review for coreboot: 4187407 intel/bd82x6x: Allow limiting of SATA speed in CMOS config

[Alexandru Gagniuc (mr.nuke.me@gmail.com)]

Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4823

-gerrit

commit 41874076d03d6e4095ec06458b1f7d8393bf0a30
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date:   Sun Jan 26 11:36:07 2014 -0600

    intel/bd82x6x: Allow limiting of SATA speed in CMOS config
    
    Up until now, the only way to limit SATA speed was via devicetree.cb,
    which required recompiling coreboot in order to lift this limit.
    However, there are cases where limiting is still desirable with the
    option to lift the limit later. To accommodate this, still check
    devicetree first, but if no hard limit is specified, then use CMOS
    to check if the user desires to limit the speed.
    
    Change-Id: I0d6ac67416edcb28eb2a9091c86dc0a22d7b1d3f
    Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
 src/southbridge/intel/bd82x6x/sata.c | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index 8d12202..1758bfe 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -46,7 +46,7 @@ static void sata_init(struct device *dev)
 	u16 reg16;
 	/* Get the chip configuration */
 	config_t *config = dev->chip_info;
-	u8 sata_mode;
+	u8 sata_mode, sata_limit;
 
 	printk(BIOS_DEBUG, "SATA: Initializing...\n");
 
@@ -106,12 +106,25 @@ static void sata_init(struct device *dev)
 		reg32 = read32(abar + 0x00);
 		reg32 |= 0x0c006000;  // set PSC+SSC+SALP+SSS
 		reg32 &= ~0x00020060; // clear SXS+EMS+PMS
-		/* Set ISS, if available */
+		/* Set ISS, if available
+		 * Try devicetree.cb first, for hard limit, otherwise look in
+		 * CMOS for user-selectable limit
+		 */
 		if (config->sata_interface_speed_limit)
 		{
+			printk(BIOS_INFO, "Applying hard limit on SATA speed");
+			sata_limit = config->sata_interface_speed_limit;
+		} else {
+			/* Default to no limit if not configured in CMOS */
+			if (get_option(&sata_limit, "sata_speed_limit")
+			    != CB_SUCCESS)
+				sata_limit = 0;
+		}
+		if (sata_limit) {
+			printk(BIOS_INFO, "Limiting SATA speed to Gen%d\n",
+					  sata_limit);
 			reg32 &= ~0x00f00000;
-			reg32 |= (config->sata_interface_speed_limit & 0x03)
-			  << 20;
+			reg32 |= (sata_limit & 0x03) << 20;
 		}
 		write32(abar + 0x00, reg32);
 		/* PI (Ports implemented) */