[coreboot-gerrit] New patch to review for coreboot: bc6aba4 baytrail: increment boot count for elog
Aaron Durbin (adurbin@google.com)
gerrit at coreboot.org
Tue Jan 28 03:55:54 CET 2014
Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4919
-gerrit
commit bc6aba4b997afacf2bedf7dff626009a747ba55f
Author: Aaron Durbin <adurbin at chromium.org>
Date: Wed Oct 30 15:46:07 2013 -0500
baytrail: increment boot count for elog
The elog boot counter in cmos was not being initialized
nor incremented. Start doing that in romstage. Since S3
resume is not detected yet the increment is unconditional.
BUG=None
BRANCH=None
TEST=Built and booted through depthcharge multiple times. Noted
output such as 'Boot Count incremented to 4'.
Change-Id: Ic585d4ad4b3af086e0067e28fe0f35c02979bbd2
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174717
Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
---
src/soc/intel/baytrail/romstage/romstage.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index e833dbd..9238eb4 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -28,6 +28,7 @@
#if CONFIG_EC_GOOGLE_CHROMEEC
#include <ec/google/chromeec/ec.h>
#endif
+#include <elog.h>
#include <ramstage_cache.h>
#include <ramstage_cache.h>
#include <romstage_handoff.h>
@@ -147,6 +148,10 @@ void romstage_common(struct romstage_params *params)
mark_ts(params, timestamp_get());
+#if CONFIG_ELOG_BOOT_COUNT
+ boot_count_increment();
+#endif
+
/* Initialize RAM */
raminit(params->mrc_params, 5);
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