[coreboot-gerrit] New patch to review for coreboot: 894b872 rambi: distribute IRQs away from PIRQA on pci devices

Aaron Durbin (adurbin@google.com) gerrit at coreboot.org
Tue Jan 28 03:56:43 CET 2014


Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4973

-gerrit

commit 894b8720468006eba7c8c3f84a0888017e2bfc0a
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Thu Nov 14 11:15:43 2013 -0600

    rambi: distribute IRQs away from PIRQA on pci devices
    
    Some of the drivers in the kernel were not so happy about
    having shared IRQs. Also, sharing IRQs means more code
    needs to be run in interrupt context to determine if the IRQ
    was meant for a particular device. Fix this.
    
    No more 'mmc1: got irq while runtime suspended' messages.
    
    BUG=chrome-os-partner:24056
    BRANCH=None
    TEST=Built and booted. Looked at /proc/interrupts and noted no
         more sharing between pci devices.
    
    Change-Id: Ie5da102204ffe3156dd55ab17af77df245a57c97
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://chromium-review.googlesource.com/176792
    Reviewed-by: Shawn Nematbakhsh <shawnn at chromium.org>
---
 src/mainboard/google/rambi/irqroute.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/google/rambi/irqroute.h b/src/mainboard/google/rambi/irqroute.h
index fa7a6c3..eaafff9 100644
--- a/src/mainboard/google/rambi/irqroute.h
+++ b/src/mainboard/google/rambi/irqroute.h
@@ -23,17 +23,17 @@
 #define PCI_DEV_PIRQ_ROUTES \
 	PCI_DEV_PIRQ_ROUTE(GFX_DEV,  A, B, C, D), \
 	PCI_DEV_PIRQ_ROUTE(SDIO_DEV, A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(SD_DEV,   A, B, C, D), \
+	PCI_DEV_PIRQ_ROUTE(SD_DEV,   C, D, E, F), \
 	PCI_DEV_PIRQ_ROUTE(SATA_DEV, A, B, C, D), \
 	PCI_DEV_PIRQ_ROUTE(XHCI_DEV, A, B, C, D), \
 	PCI_DEV_PIRQ_ROUTE(LPE_DEV,  A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(MMC_DEV,  A, B, C, D), \
+	PCI_DEV_PIRQ_ROUTE(MMC_DEV,  D, E, F, G), \
 	PCI_DEV_PIRQ_ROUTE(SIO1_DEV, A, B, C, D), \
 	PCI_DEV_PIRQ_ROUTE(TXE_DEV,  A, B, C, D), \
 	PCI_DEV_PIRQ_ROUTE(HDA_DEV,  A, B, C, D), \
 	PCI_DEV_PIRQ_ROUTE(PCIE_DEV, A, B, C, D), \
 	PCI_DEV_PIRQ_ROUTE(EHCI_DEV, A, B, C, D), \
-	PCI_DEV_PIRQ_ROUTE(SIO2_DEV, A, B, C, D), \
+	PCI_DEV_PIRQ_ROUTE(SIO2_DEV, B, C, D, E), \
 	PCI_DEV_PIRQ_ROUTE(PCU_DEV,  A, B, C, D)
 
 #define PIRQ_PIC_ROUTES \



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