[coreboot-gerrit] Patch merged into coreboot/master: 88c873a intel/lynxpoint: xhci: Port reset changes on suspend/resume
gerrit at coreboot.org
gerrit at coreboot.org
Sat Jul 5 10:12:08 CEST 2014
the following patch was just integrated into master:
commit 88c873a07ecff2c6f5ec04d178251315cf01e06a
Author: Duncan Laurie <dlaurie at chromium.org>
Date: Mon Sep 16 13:51:08 2013 -0700
intel/lynxpoint: xhci: Port reset changes on suspend/resume
Some USB3 devices are not showing up after suspend/resume cycles.
In particular if a device uses a lower power state like U2 it may
take longer to come up and the firmware needs to wait after sending
a warm port reset.
In addition skipping port reset to connected ports in the way into
suspend was causing problems so instead send all ports a reset
before suspend.
BUG=chrome-os-partner:22402
BRANCH=falco,peppy,leon,wolf
TEST=manual:
Suspend/resume with ADATA HE720 HDD (and other devices) both
connected at suspend and connecting while in suspend and ensure
that the devices always show up in the kernel.
Change-Id: Ib7b15dc65792742b4ceb7dcfc4b2c83192eafcc2
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/169548
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: http://review.coreboot.org/6015
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick at georgi-clan.de>
See http://review.coreboot.org/6015 for details.
-gerrit
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