[coreboot-gerrit] Patch set updated for coreboot: 71e4b1f superio/smsc/kbc1100: Virtually rewrite support and fix mainboards
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Tue Jun 3 14:44:00 CEST 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5916
-gerrit
commit 71e4b1f53a7a3ef1722fbd5fec2dbd7bf9752f12
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Mon Jun 2 12:20:11 2014 +1000
superio/smsc/kbc1100: Virtually rewrite support and fix mainboards
1. Remove #include .c in romstage.
2. Make romstage component symbols linker-time.
3. Provide header guards and prototypes in superio romstage support.
4. Correct function type-signatures to be static/non-static where
appropriate, avoid 'pretend optimisations' by unnecessarily inlining
functions.
5. Separate out UART enable from various other PNP hard coding
Change-Id: I9b8dad7c02d802e97db73ddf2913d5c6bb33a419
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/mainboard/amd/inagua/Kconfig | 4 --
src/mainboard/amd/inagua/romstage.c | 7 ++-
src/mainboard/amd/torpedo/Kconfig | 4 --
src/mainboard/amd/torpedo/romstage.c | 6 +-
src/superio/smsc/kbc1100/Makefile.inc | 1 +
src/superio/smsc/kbc1100/early_init.c | 80 +++++++++++++++++++++++++++
src/superio/smsc/kbc1100/kbc1100.h | 10 ++++
src/superio/smsc/kbc1100/kbc1100_early_init.c | 75 -------------------------
8 files changed, 100 insertions(+), 87 deletions(-)
diff --git a/src/mainboard/amd/inagua/Kconfig b/src/mainboard/amd/inagua/Kconfig
index 1e11f9f..279c7ef 100644
--- a/src/mainboard/amd/inagua/Kconfig
+++ b/src/mainboard/amd/inagua/Kconfig
@@ -69,10 +69,6 @@ config RAMBASE
hex
default 0x200000
-config SIO_PORT
- hex
- default 0x2e
-
config DRIVERS_PS2_KEYBOARD
bool
default y
diff --git a/src/mainboard/amd/inagua/romstage.c b/src/mainboard/amd/inagua/romstage.c
index a304d31..a7b8a40 100644
--- a/src/mainboard/amd/inagua/romstage.c
+++ b/src/mainboard/amd/inagua/romstage.c
@@ -33,11 +33,13 @@
#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
-#include "superio/smsc/kbc1100/kbc1100_early_init.c"
+#include <superio/smsc/kbc1100/kbc1100.h>
#include "cpu/x86/lapic.h"
#include <sb_cimx.h>
#include "SBPLATFORM.h"
+#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
+
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
@@ -57,7 +59,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb_Poweron_Init();
post_code(0x31);
- kbc1100_early_init(CONFIG_SIO_PORT);
+ kbc1100_early_init(0x2e);
+ kbc1100_early_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
}
diff --git a/src/mainboard/amd/torpedo/Kconfig b/src/mainboard/amd/torpedo/Kconfig
index 62ce043..6013df7 100644
--- a/src/mainboard/amd/torpedo/Kconfig
+++ b/src/mainboard/amd/torpedo/Kconfig
@@ -79,10 +79,6 @@ config RAMBASE
hex
default 0x200000
-config SIO_PORT
- hex
- default 0x2e
-
config ONBOARD_VGA_IS_PRIMARY
bool
default y
diff --git a/src/mainboard/amd/torpedo/romstage.c b/src/mainboard/amd/torpedo/romstage.c
index dcab52b..e3416c7 100644
--- a/src/mainboard/amd/torpedo/romstage.c
+++ b/src/mainboard/amd/torpedo/romstage.c
@@ -30,13 +30,14 @@
#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
-#include "superio/smsc/kbc1100/kbc1100_early_init.c"
+#include <superio/smsc/kbc1100/kbc1100.h>
#include "cpu/x86/lapic.h"
#include "sb_cimx.h"
#include "SbPlatform.h"
#include <arch/cpu.h>
#include "platform_cfg.h"
+#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
@@ -57,7 +58,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x31);
- kbc1100_early_init(CONFIG_SIO_PORT);
+ kbc1100_early_init(0x2e);
+ kbc1100_early_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
post_code(0x32);
post_code(0x33);
diff --git a/src/superio/smsc/kbc1100/Makefile.inc b/src/superio/smsc/kbc1100/Makefile.inc
index 603d24e..c3385a6 100644
--- a/src/superio/smsc/kbc1100/Makefile.inc
+++ b/src/superio/smsc/kbc1100/Makefile.inc
@@ -17,4 +17,5 @@
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
+romstage-$(CONFIG_SUPERIO_SMSC_KBC1100) += early_init.c
ramstage-$(CONFIG_SUPERIO_SMSC_KBC1100) += superio.c
diff --git a/src/superio/smsc/kbc1100/early_init.c b/src/superio/smsc/kbc1100/early_init.c
new file mode 100644
index 0000000..9d545a1
--- /dev/null
+++ b/src/superio/smsc/kbc1100/early_init.c
@@ -0,0 +1,80 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan at alterapraxis.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* Pre-RAM driver for the SMSC KBC1100 Super I/O chip */
+
+#include <arch/io.h>
+#include <device/pnp.h>
+#include <stdint.h>
+
+#include "kbc1100.h"
+
+static void pnp_enter_conf_state(device_t dev)
+{
+ u16 port = dev >> 8;
+ outb(0x55, port);
+}
+
+static void pnp_exit_conf_state(device_t dev)
+{
+ u16 port = dev >> 8;
+ outb(0xaa, port);
+}
+
+void kbc1100_early_serial(device_t dev, u16 iobase)
+{
+ pnp_enter_conf_state(dev);
+ pnp_set_logical_device(dev);
+ pnp_set_enable(dev, 0);
+ pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+ pnp_set_enable(dev, 1);
+ pnp_exit_conf_state(dev);
+}
+
+void kbc1100_early_init(u16 port)
+{
+ device_t dev;
+ dev = PNP_DEV (port, KBC1100_KBC);
+ pnp_enter_conf_state(dev);
+
+ /* Serial IRQ enabled */
+ u16 port = dev >> 8;
+ outb(0x25, port);
+ outb(0x04, port + 1);
+
+ /* Enable keyboard */
+ pnp_set_logical_device(dev);
+ pnp_set_enable(dev, 0);
+ pnp_set_iobase(dev, PNP_IDX_IO0, 0x60);
+ pnp_set_iobase(dev, PNP_IDX_IO1, 0x64);
+ pnp_set_irq(dev, 0x70, 1); /* IRQ 1 */
+ pnp_set_irq(dev, 0x72, 12); /* IRQ 12 */
+ pnp_set_enable(dev, 1);
+
+ /* Enable EC Channel 0 */
+ dev = PNP_DEV (port, KBC1100_EC0);
+ pnp_set_logical_device(dev);
+ pnp_set_enable(dev, 1);
+
+ pnp_exit_conf_state(dev);
+
+ /* disable the 1s timer */
+ outb(0xE7, 0x64);
+}
diff --git a/src/superio/smsc/kbc1100/kbc1100.h b/src/superio/smsc/kbc1100/kbc1100.h
index 3fe6327..2b588f9 100644
--- a/src/superio/smsc/kbc1100/kbc1100.h
+++ b/src/superio/smsc/kbc1100/kbc1100.h
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan at alterapraxis.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -17,6 +18,12 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#ifndef SUPERIO_SMSC_KBC1100_H
+#define SUPERIO_SMSC_KBC1100_H
+
+#include <arch/io.h>
+#include <stdint.h>
+
#define KBC1100_PM1 1 /* PM1 */
#define SMSCSUPERIO_SP1 4 /* Com1 */
#define SMSCSUPERIO_SP2 5 /* Com2 */
@@ -29,4 +36,7 @@
#define KBC1100_EC1 0x0D /* EC Channel 1 */
#define KBC1100_EC2 0x0E /* EC Channel 2 */
+void kbc1100_early_serial(device_t dev, u16 iobase);
+void kbc1100_early_init(u16 port);
+#endif /* SUPERIO_SMSC_KBC1100_H */
diff --git a/src/superio/smsc/kbc1100/kbc1100_early_init.c b/src/superio/smsc/kbc1100/kbc1100_early_init.c
deleted file mode 100644
index 5d74c32..0000000
--- a/src/superio/smsc/kbc1100/kbc1100_early_init.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/* Pre-RAM driver for the SMSC KBC1100 Super I/O chip */
-
-#include <arch/io.h>
-#include "kbc1100.h"
-
-static inline void pnp_enter_conf_state(device_t dev)
-{
- unsigned port = dev>>8;
- outb(0x55, port);
-}
-
-static void pnp_exit_conf_state(device_t dev)
-{
- unsigned port = dev>>8;
- outb(0xaa, port);
-}
-
-static inline void kbc1100_early_init(unsigned port)
-{
- device_t dev;
- dev = PNP_DEV (port, KBC1100_KBC);
-
- pnp_enter_conf_state(dev);
-
- /* Serial IRQ enabled */
- outb(0x25, port);
- outb(0x04, port + 1);
-
- /* Enable SMSC UART 0 */
- dev = PNP_DEV (port, SMSCSUPERIO_SP1);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, CONFIG_TTYS0_BASE);
- pnp_set_enable(dev, 1);
-
- /* Enable keyboard */
- dev = PNP_DEV (port, KBC1100_KBC);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, 0x60);
- pnp_set_iobase(dev, PNP_IDX_IO1, 0x64);
- pnp_set_irq(dev, 0x70, 1); /* IRQ 1 */
- pnp_set_irq(dev, 0x72, 12); /* IRQ 12 */
- pnp_set_enable(dev, 1);
-
- /* Enable EC Channel 0 */
- dev = PNP_DEV (port, KBC1100_EC0);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 1);
-
- pnp_exit_conf_state(dev);
-
- /* disable the 1s timer */
- outb(0xE7, 0x64);
-}
-
More information about the coreboot-gerrit
mailing list