[coreboot-gerrit] New patch to review for coreboot: 1db5572 amd/agesa/f15tn: Invalid inline asm in gcc-intrin.h
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Fri Jun 6 01:59:15 CEST 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5941
-gerrit
commit 1db5572d23dff23f23b3ec7ced470a67305d0868
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Fri Jun 6 09:51:23 2014 +1000
amd/agesa/f15tn: Invalid inline asm in gcc-intrin.h
Forward port commit:
db0e0e2 amd/agesa/*/gcc-intrin.h: Invaild inline asm
Change-Id: I87bf101b15bac7c06afa9cec10e2bd4e0cdfd6c7
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
.../amd/agesa/f15tn/Include/gcc-intrin.h | 197 ++++++++++++---------
1 file changed, 112 insertions(+), 85 deletions(-)
diff --git a/src/vendorcode/amd/agesa/f15tn/Include/gcc-intrin.h b/src/vendorcode/amd/agesa/f15tn/Include/gcc-intrin.h
index ea80746..7d90f8b 100644
--- a/src/vendorcode/amd/agesa/f15tn/Include/gcc-intrin.h
+++ b/src/vendorcode/amd/agesa/f15tn/Include/gcc-intrin.h
@@ -1,6 +1,6 @@
/*
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
+ * Copyright (c) 2011, Advanced Micro Devices, Inc. All rights reserved.
+ * Copyright (c) 2014, Edward O'Callaghan <eocallaghan at alterapraxis.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -34,9 +34,9 @@ static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned
unsigned char value;
__asm__ __volatile__ (
- "in %%dx, %%al"
+ "in %1, %0"
: "=a" (value)
- : "d" (Port)
+ : "Nd" (Port)
);
return value;
@@ -47,9 +47,9 @@ static __inline__ __attribute__((always_inline)) unsigned short __inword(unsigne
unsigned short value;
__asm__ __volatile__ (
- "in %%dx, %%ax"
+ "in %1, %0"
: "=a" (value)
- : "d" (Port)
+ : "Nd" (Port)
);
return value;
@@ -60,9 +60,9 @@ static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigne
unsigned long value;
__asm__ __volatile__ (
- "in %%dx, %%eax"
+ "in %1, %0"
: "=a" (value)
- : "d" (Port)
+ : "Nd" (Port)
);
return value;
@@ -71,81 +71,81 @@ static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigne
static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short Port,unsigned char Data)
{
__asm__ __volatile__ (
- "out %%al, %%dx"
+ "out %0, %1"
:
- : "a" (Data), "d" (Port)
+ : "a" (Data), "Nd" (Port)
);
}
static __inline__ __attribute__((always_inline)) void __outword(unsigned short Port,unsigned short Data)
{
__asm__ __volatile__ (
- "out %%ax, %%dx"
+ "out %0, %1"
:
- : "a" (Data), "d" (Port)
+ : "a" (Data), "Nd" (Port)
);
}
static __inline__ __attribute__((always_inline)) void __outdword(unsigned short Port,unsigned long Data)
{
__asm__ __volatile__ (
- "out %%eax, %%dx"
+ "out %0, %1"
:
- : "a" (Data), "d" (Port)
+ : "a" (Data), "Nd" (Port)
);
}
static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
- "cld ; rep ; insb "
- : "=D" (Buffer), "=c" (Count)
- : "d"(Port), "0"(Buffer), "1" (Count)
+ "rep ; insb"
+ : "+D" (Buffer), "+c" (Count)
+ : "d"(Port)
);
}
static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
- "cld ; rep ; insw "
- : "=D" (Buffer), "=c" (Count)
- : "d"(Port), "0"(Buffer), "1" (Count)
+ "rep ; insw"
+ : "+D" (Buffer), "+c" (Count)
+ : "d"(Port)
);
}
static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
- "cld ; rep ; insl "
- : "=D" (Buffer), "=c" (Count)
- : "d"(Port), "0"(Buffer), "1" (Count)
+ "rep ; insl"
+ : "+D" (Buffer), "+c" (Count)
+ : "d"(Port)
);
}
static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
- "cld ; rep ; outsb "
- : "=S" (Buffer), "=c" (Count)
- : "d"(Port), "0"(Buffer), "1" (Count)
+ "rep ; outsb"
+ : "+S" (Buffer), "+c" (Count)
+ : "d"(Port)
);
}
static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
- "cld ; rep ; outsw "
- : "=S" (Buffer), "=c" (Count)
- : "d"(Port), "0"(Buffer), "1" (Count)
+ "rep ; outsw"
+ : "+S" (Buffer), "+c" (Count)
+ : "d"(Port)
);
}
static __inline__ __attribute__((always_inline)) void __outdwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
- "cld ; rep ; outsl "
- : "=S" (Buffer), "=c" (Count)
- : "d"(Port), "0"(Buffer), "1" (Count)
+ "rep ; outsl"
+ : "+S" (Buffer), "+c" (Count)
+ : "d"(Port)
);
}
@@ -154,7 +154,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __readdr0(void)
unsigned long value;
__asm__ __volatile__ (
"mov %%dr0, %[value]"
- : [value] "=a" (value)
+ : [value] "=r" (value)
);
return value;
}
@@ -164,7 +164,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __readdr1(void)
unsigned long value;
__asm__ __volatile__ (
"mov %%dr1, %[value]"
- : [value] "=a" (value)
+ : [value] "=r" (value)
);
return value;
}
@@ -174,7 +174,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __readdr2(void)
unsigned long value;
__asm__ __volatile__ (
"mov %%dr2, %[value]"
- : [value] "=a" (value)
+ : [value] "=r" (value)
);
return value;
}
@@ -184,7 +184,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __readdr3(void)
unsigned long value;
__asm__ __volatile__ (
"mov %%dr3, %[value]"
- : [value] "=a" (value)
+ : [value] "=r" (value)
);
return value;
}
@@ -194,7 +194,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __readdr7(void)
unsigned long value;
__asm__ __volatile__ (
"mov %%dr7, %[value]"
- : [value] "=a" (value)
+ : [value] "=r" (value)
);
return value;
}
@@ -230,45 +230,45 @@ static __inline__ __attribute__((always_inline)) unsigned long __readdr(unsigned
static __inline__ __attribute__((always_inline)) void __writedr0(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%dr0"
+ "mov %0, %%dr0"
:
- : "a" (Data)
+ : "r" (Data)
);
}
static __inline__ __attribute__((always_inline)) void __writedr1(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%dr1"
+ "mov %0, %%dr1"
:
- : "a" (Data)
+ : "r" (Data)
);
}
static __inline__ __attribute__((always_inline)) void __writedr2(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%dr2"
+ "mov %0, %%dr2"
:
- : "a" (Data)
+ : "r" (Data)
);
}
static __inline__ __attribute__((always_inline)) void __writedr3(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%dr3"
+ "mov %0, %%dr3"
:
- : "a" (Data)
+ : "r" (Data)
);
}
static __inline__ __attribute__((always_inline)) void __writedr7(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%dr7"
+ "mov %0, %%dr7"
:
- : "a" (Data)
+ : "r" (Data)
);
}
@@ -305,7 +305,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __readcr0(void)
unsigned long value;
__asm__ __volatile__ (
"mov %%cr0, %[value]"
- : [value] "=a" (value));
+ : [value] "=r" (value));
return value;
}
@@ -314,7 +314,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __readcr2(void)
unsigned long value;
__asm__ __volatile__ (
"mov %%cr2, %[value]"
- : [value] "=a" (value));
+ : [value] "=r" (value));
return value;
}
@@ -323,7 +323,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __readcr3(void)
unsigned long value;
__asm__ __volatile__ (
"mov %%cr3, %[value]"
- : [value] "=a" (value));
+ : [value] "=r" (value));
return value;
}
@@ -332,7 +332,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __readcr4(void)
unsigned long value;
__asm__ __volatile__ (
"mov %%cr4, %[value]"
- : [value] "=a" (value));
+ : [value] "=r" (value));
return value;
}
@@ -341,7 +341,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __readcr8(void)
unsigned long value;
__asm__ __volatile__ (
"mov %%cr8, %[value]"
- : [value] "=a" (value));
+ : [value] "=r" (value));
return value;
}
@@ -376,45 +376,46 @@ static __inline__ __attribute__((always_inline)) unsigned long __readcr(unsigned
static __inline__ __attribute__((always_inline)) void __writecr0(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%cr0"
+ "mov %0, %%cr0"
:
- : "a" (Data)
+ : "r" (Data)
+ : "memory"
);
}
static __inline__ __attribute__((always_inline)) void __writecr2(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%cr2"
+ "mov %0, %%cr2"
:
- : "a" (Data)
+ : "r" (Data)
);
}
static __inline__ __attribute__((always_inline)) void __writecr3(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%cr3"
+ "mov %0, %%cr3"
:
- : "a" (Data)
+ : "r" (Data)
);
}
static __inline__ __attribute__((always_inline)) void __writecr4(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%cr4"
+ "mov %0, %%cr4"
:
- : "a" (Data)
+ : "r" (Data)
);
}
static __inline__ __attribute__((always_inline)) void __writecr8(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%cr8"
+ "mov %0, %%cr8"
:
- : "a" (Data)
+ : "r" (Data)
);
}
@@ -450,7 +451,7 @@ static __inline__ __attribute__((always_inline)) UINT64 __readmsr(UINT32 msr)
{
UINT64 retval;
__asm__ __volatile__(
- "rdmsr\n\t"
+ "rdmsr"
: "=A" (retval)
: "c" (msr)
);
@@ -460,7 +461,7 @@ static __inline__ __attribute__((always_inline)) UINT64 __readmsr(UINT32 msr)
static __inline__ __attribute__((always_inline)) void __writemsr (UINT32 msr, UINT64 Value)
{
__asm__ __volatile__ (
- "wrmsr\n\t"
+ "wrmsr"
:
: "c" (msr), "A" (Value)
);
@@ -484,26 +485,35 @@ static __inline__ __attribute__((always_inline)) void __cpuid(int CPUInfo[], con
);
}
+
static __inline__ __attribute__((always_inline)) void _disable(void)
{
__asm__ __volatile__ ("cli");
}
+
static __inline__ __attribute__((always_inline)) void _enable(void)
{
__asm__ __volatile__ ("sti");
}
+
static __inline__ __attribute__((always_inline)) void __halt(void)
{
__asm__ __volatile__ ("hlt");
}
+
static __inline__ __attribute__((always_inline)) void __debugbreak(void)
{
__asm__ __volatile__ ("int3");
}
+static __inline__ __attribute__((always_inline)) void __invd(void)
+{
+ __asm__ __volatile__ ("invd");
+}
+
static __inline__ __attribute__((always_inline)) void __wbinvd(void)
{
__asm__ __volatile__ ("wbinvd");
@@ -514,39 +524,57 @@ static __inline__ __attribute__((always_inline)) void __lidt(void *Source)
__asm__ __volatile__("lidt %0" : : "m"(*(short*)Source));
}
-static __inline__ __attribute__((always_inline)) void __writefsbyte(const unsigned long Offset, const unsigned char Data)
+static __inline__ __attribute__((always_inline)) void
+__writefsbyte(const unsigned long Offset, const unsigned char Data)
{
- __asm__("movb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
+ __asm__ ("movb %[Data], %%fs:%a[Offset]"
+ :
+ : [Offset] "ir" (Offset), [Data] "iq" (Data));
}
-static __inline__ __attribute__((always_inline)) void __writefsword(const unsigned long Offset, const unsigned short Data)
+static __inline__ __attribute__((always_inline)) void
+__writefsword(const unsigned long Offset, const unsigned short Data)
{
- __asm__("movw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
+ __asm__ ("movw %[Data], %%fs:%a[Offset]"
+ :
+ : [Offset] "ir" (Offset), [Data] "ir" (Data));
}
-static __inline__ __attribute__((always_inline)) void __writefsdword(const unsigned long Offset, const unsigned long Data)
+static __inline__ __attribute__((always_inline)) void
+__writefsdword(const unsigned long Offset, const unsigned long Data)
{
- __asm__("movl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
+ __asm__ ("movl %[Data], %%fs:%a[Offset]"
+ :
+ : [Offset] "ir" (Offset), [Data] "ir" (Data));
}
-static __inline__ __attribute__((always_inline)) unsigned char __readfsbyte(const unsigned long Offset)
+static __inline__ __attribute__((always_inline)) unsigned char
+__readfsbyte(const unsigned long Offset)
{
unsigned char value;
- __asm__("movb %%fs:%a[Offset], %b[value]" : [value] "=q" (value) : [Offset] "irm" (Offset));
+ __asm__ ("movb %%fs:%a[Offset], %[value]"
+ : [value] "=q" (value)
+ : [Offset] "ir" (Offset));
return value;
}
-static __inline__ __attribute__((always_inline)) unsigned short __readfsword(const unsigned long Offset)
+static __inline__ __attribute__((always_inline)) unsigned short
+__readfsword(const unsigned long Offset)
{
unsigned short value;
- __asm__("movw %%fs:%a[Offset], %w[value]" : [value] "=q" (value) : [Offset] "irm" (Offset));
+ __asm__ ("movw %%fs:%a[Offset], %[value]"
+ : [value] "=q" (value)
+ : [Offset] "ir" (Offset));
return value;
}
-static __inline__ __attribute__((always_inline)) unsigned long long __readfsdword(unsigned long long Offset)
+static __inline__ __attribute__((always_inline)) unsigned long
+__readfsdword(unsigned long Offset)
{
- unsigned long long value;
- __asm__("movl %%fs:%a[Offset], %k[value]" : [value] "=q" (value) : [Offset] "irm" (Offset));
+ unsigned long value;
+ __asm__ ("movl %%fs:%a[Offset], %[value]"
+ : [value] "=r" (value)
+ : [Offset] "ir" (Offset));
return value;
}
@@ -582,23 +610,22 @@ static __inline __attribute__(( __always_inline__)) void _mm_sfence (void)
{
__builtin_ia32_sfence ();
}
-#endif
+#endif /* __SSE3__ */
static __inline__ __attribute__((always_inline)) void __stosb(unsigned char *dest, unsigned char data, size_t count)
{
__asm__ __volatile__ (
- "cld ; rep ; stosb "
- : "=D" (dest), "=c" (count)
- : "a"(data), "0"(dest), "1" (count)
+ "rep ; stosb "
+ : "+D" (dest), "+c" (count)
+ : "a"(data)
);
}
static __inline__ __attribute__((always_inline)) void __movsb(unsigned char *dest, unsigned char *data, size_t count)
{
__asm__ __volatile__ (
- "cld ; rep ; movsb "
- : "=D" (dest), "=S"(data), "=c" (count)
- : "S"(data), "0"(dest), "1" (count)
+ "movsb "
+ : "+D" (dest), "+S"(data), "+c" (count)
);
}
@@ -621,4 +648,4 @@ void delay_point ( unsigned short Port, unsigned long Data, unsigned long delayT
Index ++;
}
}
-#endif // defined (__GNUC__)
+#endif /* defined (__GNUC__) */
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