[coreboot-gerrit] New patch to review for coreboot: 7e4ef0a superio/smscsuperio: Fix chip detection

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Fri Jun 6 21:46:04 CEST 2014


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5949

-gerrit

commit 7e4ef0ac9cbd442fca2c1d53ae927567de8d4f4f
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Fri Jun 6 21:46:47 2014 +0300

    superio/smscsuperio: Fix chip detection
    
    There was dereference of NULL dev->ops in pnp_enter/exit_conf_mode()
    as those calls were made before pnp_enable_devices() was run.
    Since hardware did not enter configuration mode, detection failed with
    ID and REV read as 0xff.
    
    Change-Id: If13086707cd86e392890ccf4f717e13a87f3317f
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/superio/smsc/smscsuperio/superio.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/superio/smsc/smscsuperio/superio.c b/src/superio/smsc/smscsuperio/superio.c
index 0d62a9a..f2ebbcd 100644
--- a/src/superio/smsc/smscsuperio/superio.c
+++ b/src/superio/smsc/smscsuperio/superio.c
@@ -231,11 +231,14 @@ static void enable_dev(device_t dev)
 	u8 test7;
 
 	if (first_time) {
-		/* Read the device ID and revision of the Super I/O chip. */
+
+		/* Set dev->ops, pnp_enable_devices() is not called yet. */
+		dev->ops = &ops;
 		pnp_enter_conf_mode(dev);
+
+		/* Read the device ID and revision of the Super I/O chip. */
 		superio_id = pnp_read_config(dev, DEVICE_ID_REG);
 		superio_rev = pnp_read_config(dev, DEVICE_REV_REG);
-		pnp_exit_conf_mode(dev);
 
 		/* TODO: Error handling? */
 
@@ -257,6 +260,10 @@ static void enable_dev(device_t dev)
 			test7 |= (1 << 0);
 			pnp_write_config(dev, DEVICE_TEST7_REG, test7);
 		}
+
+		pnp_exit_conf_mode(dev);
+		/* Reset dev->ops, see pnp_enable_devices(). */
+		dev->ops = NULL;
 	}
 
 	/* Find the correct Super I/O. */



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