[coreboot-gerrit] Patch merged into coreboot/master: ac1b875 amd/southbridge/lpc: SPI BAR has fixed size/location
gerrit at coreboot.org
gerrit at coreboot.org
Wed Jun 11 20:06:23 CEST 2014
the following patch was just integrated into master:
commit ac1b875b554f45b0c98d375369119495b7ad2a2a
Author: Dave Frodin <dave.frodin at se-eng.com>
Date: Thu Jun 5 14:30:22 2014 -0600
amd/southbridge/lpc: SPI BAR has fixed size/location
The CIMX sb700/sb800/sb900 and agesa/hudson code was treating
the LPC SPI BAR as a normal PCI BAR. This will set the
resources for a fixed size at a fixed address. This was tested
on hp/abm, amd/persimmon, and gizmosphere/gizmo boards.
Change-Id: I1367efe0bbb53b7727258585963f61f4bd02ea1d
Signed-off-by: Dave Frodin <dave.frodin at se-eng.com>
Reviewed-on: http://review.coreboot.org/5947
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
See http://review.coreboot.org/5947 for details.
-gerrit
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