[coreboot-gerrit] Patch set updated for coreboot: ededa29 haswell: Report x32 memory as "x8 or x32"

Matt DeVillier (matt.devillier@gmail.com) gerrit at coreboot.org
Sun Jun 15 20:09:09 CEST 2014


Matt DeVillier (matt.devillier at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6008

-gerrit

commit ededa29d085e2bd95dc52d6c6c56c590389cbf6d
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Tue Oct 22 16:32:49 2013 -0700

    haswell: Report x32 memory as "x8 or x32"
    
    There is only one bit for memory width reporting, either x16 or
    other.  With x32 memory this code is reporting it as x8 so instead
    report "x8 or x32" in this condition.
    
    BUG=chrome-os-partner:23449
    BRANCH=samus
    TEST=emerge-samus chromeos-coreboot-samus
    
    Change-Id: I2a7c49bcb8de19084947b9dc42b93140641886fc
    Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://chromium-review.googlesource.com/174120
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/northbridge/intel/haswell/raminit.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index 4138c5f..1577e68 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -118,14 +118,14 @@ static void report_memory_config(void)
 		       ((ch_conf >> 22) & 1) ? "on" : "off");
 		printk(BIOS_DEBUG, "   rank interleave %s\n",
 		       ((ch_conf >> 21) & 1) ? "on" : "off");
-		printk(BIOS_DEBUG, "   DIMMA %d MB width x%d %s rank%s\n",
+		printk(BIOS_DEBUG, "   DIMMA %d MB width %s %s rank%s\n",
 		       ((ch_conf >> 0) & 0xff) * 256,
-		       ((ch_conf >> 19) & 1) ? 16 : 8,
+		       ((ch_conf >> 19) & 1) ? "x16" : "x8 or x32",
 		       ((ch_conf >> 17) & 1) ? "dual" : "single",
 		       ((ch_conf >> 16) & 1) ? "" : ", selected");
-		printk(BIOS_DEBUG, "   DIMMB %d MB width x%d %s rank%s\n",
+		printk(BIOS_DEBUG, "   DIMMB %d MB width %s %s rank%s\n",
 		       ((ch_conf >> 8) & 0xff) * 256,
-		       ((ch_conf >> 20) & 1) ? 16 : 8,
+		       ((ch_conf >> 19) & 1) ? "x16" : "x8 or x32",
 		       ((ch_conf >> 18) & 1) ? "dual" : "single",
 		       ((ch_conf >> 16) & 1) ? ", selected" : "");
 	}



More information about the coreboot-gerrit mailing list