[coreboot-gerrit] Patch set updated for coreboot: af9cf7f superio/nuvoton: Adds a function to route pins 41-48 to UARTD

[Dave Frodin (dave.frodin@se-eng.com)]

Dave Frodin (dave.frodin at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5963

-gerrit

commit af9cf7f4511f202a8ac753b52e0962948b0a7b8e
Author: Dave Frodin <dave.frodin at se-eng.com>
Date:   Mon Jun 9 12:33:24 2014 -0600

    superio/nuvoton: Adds a function to route pins 41-48 to UARTD
    
    Pins 41-48 default to being GPIs. This switches the internal
    mux to connect them to UARTD.
    
    Change-Id: I61393b8c35cbc664f6520f60eed09ba4bbede0dc
    Signed-off-by: Dave Frodin <dave.frodin at se-eng.com>
---
 src/superio/nuvoton/Makefile.inc            |  1 +
 src/superio/nuvoton/nct5104d/early_serial.c | 77 +++++++++++++++++++++++++++++
 src/superio/nuvoton/nct5104d/nct5104d.h     |  8 +--
 3 files changed, 83 insertions(+), 3 deletions(-)

diff --git a/src/superio/nuvoton/Makefile.inc b/src/superio/nuvoton/Makefile.inc
index 1ce6963..6fd1266 100644
--- a/src/superio/nuvoton/Makefile.inc
+++ b/src/superio/nuvoton/Makefile.inc
@@ -19,6 +19,7 @@
 
 ## include generic nuvoton pre-ram stage driver
 romstage-$(CONFIG_SUPERIO_NUVOTON_COMMON_ROMSTAGE) += common/early_serial.c
+romstage-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += nct5104d/early_serial.c
 
 subdirs-$(CONFIG_SUPERIO_NUVOTON_WPCM450) += wpcm450
 subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += nct5104d
diff --git a/src/superio/nuvoton/nct5104d/early_serial.c b/src/superio/nuvoton/nct5104d/early_serial.c
new file mode 100644
index 0000000..2d63268
--- /dev/null
+++ b/src/superio/nuvoton/nct5104d/early_serial.c
@@ -0,0 +1,77 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan at alterapraxis.com>
+ * Copyright (C) 2014 Felix Held <felix-coreboot at felixheld.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/*
+ * A generic romstage (pre-ram) driver for Nuvoton variant Super I/O chips.
+ *
+ * The following is derived directly from the vendor Nuvoton's data-sheets:
+ *
+ * To toggle between `configuration mode` and `normal operation mode` as to
+ * manipulate the various LDN's in Nuvoton Super I/O's we are required to
+ * pass magic numbers `passwords keys`.
+ *
+ *  NUVOTON_ENTRY_KEY :=  enable  configuration : 0x87
+ *  NUVOTON_EXIT_KEY  :=  disable configuration : 0xAA
+ *
+ * To modify a LDN's configuration register, we use the index port to select
+ * the index of the LDN and then write to the data port to alter the
+ * parameters. A default index, data port pair is 0x4E, 0x4F respectively, a
+ * user modified pair is 0x2E, 0x2F respectively.
+ *
+ */
+
+#include <arch/io.h>
+#include <device/pnp.h>
+#include <stdint.h>
+#include "nct5104d.h"
+
+#define NUVOTON_ENTRY_KEY 0x87
+#define NUVOTON_EXIT_KEY 0xAA
+
+/* Enable configuration: pass entry key '0x87' into index port dev
+ * two times. */
+static void pnp_enter_conf_state(device_t dev)
+{
+	u16 port = dev >> 8;
+	outb(NUVOTON_ENTRY_KEY, port);
+	outb(NUVOTON_ENTRY_KEY, port);
+}
+
+/* Disable configuration: pass exit key '0xAA' into index port dev. */
+static void pnp_exit_conf_state(device_t dev)
+{
+	u16 port = dev >> 8;
+	outb(NUVOTON_EXIT_KEY, port);
+}
+
+/* Route UARTD to pins 41-48 */
+void nuvoton_enable_uartd(device_t dev)
+{
+	u8 tmp;
+	u16 port = dev >> 8;
+	pnp_enter_conf_state(dev);
+	outb(0x1c, port);
+	tmp = inb(port + 1);
+	tmp |= 0x04;
+	outb(tmp, port + 1);
+	pnp_exit_conf_state(dev);
+}
diff --git a/src/superio/nuvoton/nct5104d/nct5104d.h b/src/superio/nuvoton/nct5104d/nct5104d.h
index b72dda0..f6a0387 100644
--- a/src/superio/nuvoton/nct5104d/nct5104d.h
+++ b/src/superio/nuvoton/nct5104d/nct5104d.h
@@ -19,8 +19,8 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#ifndef SUPERIO_NUVOTON_NCT5104D_NCT5104D_H
-#define SUPERIO_NUVOTON_NCT5104D_NCT5104D_H
+#ifndef SUPERIO_NUVOTON_NCT5104D_H
+#define SUPERIO_NUVOTON_NCT5104D_H
 
 /* Logical Device Numbers (LDN). */
 #define NCT5104D_FDC        0x00 /* FDC - not pinned out */
@@ -42,4 +42,6 @@
 #define NCT5104D_GPIO1 ((1 << 8) | NCT5104D_GPIO_V)
 #define NCT5104D_GPIO6 ((6 << 8) | NCT5104D_GPIO_V)
 
-#endif /* SUPERIO_NUVOTON_NCT5104D_NCT5104D_H */
+void nuvoton_enable_uartd(device_t dev);
+
+#endif /* SUPERIO_NUVOTON_NCT5104D_H */