[coreboot-gerrit] New patch to review for coreboot: dd0945e AMD cimx/sb800: Use acpi_is_wakeup_s3()
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Fri Jun 20 09:39:12 CEST 2014
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6077
-gerrit
commit dd0945ea384e72722cffd8634d7d3c04624ac323
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Thu Jun 19 20:44:34 2014 +0300
AMD cimx/sb800: Use acpi_is_wakeup_s3()
Change-Id: If237c2fcd52f50d5fa0cad5a02a941386b085f2e
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/northbridge/amd/agesa/family14/northbridge.c | 7 +------
src/southbridge/amd/cimx/sb800/late.c | 6 +-----
2 files changed, 2 insertions(+), 11 deletions(-)
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index ec07c18..7b6b401 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -761,17 +761,12 @@ static void domain_enable_resources(device_t dev)
u32 val;
#if CONFIG_AMD_SB_CIMX
- #if CONFIG_HAVE_ACPI_RESUME
- if (acpi_slp_type != 3) {
+ if (!acpi_is_wakeup_s3()) {
sb_After_Pci_Init();
sb_Mid_Post_Init();
} else {
sb_After_Pci_Restore_Init();
}
- #else
- sb_After_Pci_Init();
- sb_Mid_Post_Init();
- #endif
#endif
/* Must be called after PCI enumeration and resource allocation */
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index f4c5fd4..8000601 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -498,14 +498,10 @@ static void sb800_enable(device_t dev)
/* call the CIMX entry at the last sb800 device,
* so make sure the mainboard devicetree is complete
*/
-#if CONFIG_HAVE_ACPI_RESUME
- if (acpi_slp_type != 3)
+ if (!acpi_is_wakeup_s3())
sb_Before_Pci_Init();
else
sb_Before_Pci_Restore_Init();
-#else
- sb_Before_Pci_Init();
-#endif
break;
default:
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