[coreboot-gerrit] Patch set updated for coreboot: eec40f6 superio/fintek/f71869ad: Fix incorrect LDN's.

[Edward O'Callaghan (eocallaghan@alterapraxis.com)]

Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5399

-gerrit

commit eec40f65c05412ac0fab7ca01e57b61236c85f81
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Sun Mar 23 04:39:40 2014 +1100

    superio/fintek/f71869ad: Fix incorrect LDN's.
    
    Turns out there are a few minor differences of the LDN's in the AD rev.
    of this Fintek chip. 0x07 is in fact the WDT so renaming and remove the
    now incorrect io mask. Add missing CIR LDN functionality. Fix GPIO mask
    and touch up src inline doc.
    
    Change-Id: Ibe20515a5b348a32dc3e956b319aa34a398b67b4
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/superio/fintek/f71869ad/f71869ad.h |  3 ++-
 src/superio/fintek/f71869ad/superio.c  | 10 ++++++----
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/src/superio/fintek/f71869ad/f71869ad.h b/src/superio/fintek/f71869ad/f71869ad.h
index abc0260..069d8dc 100644
--- a/src/superio/fintek/f71869ad/f71869ad.h
+++ b/src/superio/fintek/f71869ad/f71869ad.h
@@ -29,7 +29,8 @@
 #define F71869AD_HWM    0x04	/* Hardware monitor */
 #define F71869AD_KBC    0x05	/* PS/2 keyboard and mouse */
 #define F71869AD_GPIO   0x06	/* General Purpose I/O (GPIO) */
-#define F71869AD_BSEL   0x07	/* BSEL */
+#define F71869AD_WDT    0x07	/* WDT */
+#define F71869AD_CIR    0x08	/* CIR */
 #define F71869AD_PME    0x0a	/* Power Management Events (PME) and ACPI */
 
 void f71869ad_enable_serial(device_t dev, u16 iobase);
diff --git a/src/superio/fintek/f71869ad/superio.c b/src/superio/fintek/f71869ad/superio.c
index 11ad6f8..2e6c13b 100644
--- a/src/superio/fintek/f71869ad/superio.c
+++ b/src/superio/fintek/f71869ad/superio.c
@@ -99,8 +99,9 @@ static struct device_operations ops = {
  *					irq 0x72 = 12           # Mouse IRQ
  *				end
  *				device pnp 4e.06 off end    # GPIO
- *				device pnp 4e.07 on end     # BSEL
- *				device pnp 4e.0a off end    # PME
+ *				device pnp 4e.07 on end     # WDT
+ *				device pnp 4e.08 off end    # CIR
+ *				device pnp 4e.0a on end     # PME
  *			end # f71869ad
  *
  */
@@ -111,8 +112,9 @@ static struct pnp_info pnp_dev_info[] = {
 	{ &ops, F71869AD_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
 	{ &ops, F71869AD_HWM,  PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
 	{ &ops, F71869AD_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, },
-	{ &ops, F71869AD_GPIO, },
-	{ &ops, F71869AD_BSEL,  PNP_IO0, {0x07f8, 0}, },
+	{ &ops, F71869AD_GPIO, PNP_IO0, {0x07f8, 0}, },
+	{ &ops, F71869AD_WDT, },
+	{ &ops, F71869AD_CIR, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
 	{ &ops, F71869AD_PME, },
 };