[coreboot-gerrit] New patch to review for coreboot: 615c1e9 jetway/nf81-t56n-lf: Sanitize #includes
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Sat Mar 29 08:06:27 CET 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5414
-gerrit
commit 615c1e95cd005637a735739f153f5efba1538e97
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Sat Mar 29 17:54:26 2014 +1100
jetway/nf81-t56n-lf: Sanitize #includes
There were a number of things wrong with the includes. First, The
includes did not use paths to AGESA files, thus relying on the
compiler include paths to find the correct file. This made it unclear
where the file included was located, and whether it was local, under
vendorcode, or under a different directory. Instead, use full paths
for each non-local include.
Second, the local includes were mixed with the rest, making it unclear
which file is local and which one is not. Keep the local includes at
the top. This also prevents us from polluting the namespace of local
headers, with library definitions, and allows us to catch if we missed
an otherwise needed external header.
Thirdly, alphabetize the order of includes where possible.
Change-Id: I97b73a349ca7e49b413d7c04900f25076488dde4
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
.../jetway/nf81-t56n-lf/PlatformGnbPcie.c | 7 ++---
.../jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h | 5 ++--
src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c | 11 ++++----
src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c | 22 ++++++----------
src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h | 4 +--
src/mainboard/jetway/nf81-t56n-lf/buildOpts.c | 3 ++-
src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c | 7 ++---
src/mainboard/jetway/nf81-t56n-lf/irq_tables.c | 5 ++--
src/mainboard/jetway/nf81-t56n-lf/mainboard.c | 13 +++++-----
src/mainboard/jetway/nf81-t56n-lf/mptable.c | 9 ++++---
src/mainboard/jetway/nf81-t56n-lf/romstage.c | 30 ++++++++++++----------
11 files changed, 55 insertions(+), 61 deletions(-)
diff --git a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c
index 3cd69f1..d7413cd 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c
@@ -17,14 +17,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include "AGESA.h"
-#include "amdlib.h"
-#include "Ids.h"
-#include "heapManager.h"
#include "PlatformGnbPcieComplex.h"
-#include "Filecode.h"
#include "BiosCallOuts.h"
+#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
+
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
/*---------------------------------------------------------------------------------------*/
diff --git a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
index ec8a6e3..a5b0bc5 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
+++ b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
@@ -20,9 +20,8 @@
#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
#define _PLATFORM_GNB_PCIE_COMPLEX_H
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
+#include <vendorcode/amd/agesa/f14/AGESA.h>
+#include <vendorcode/amd/agesa/f14/Lib/amdlib.h>
#include <cpu/amd/agesa/s3_resume.h>
//GNB GPP Port4
diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c b/src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c
index 43ee9c9..fb3b45b 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c
@@ -17,17 +17,16 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <console/console.h>
-#include <string.h>
+#include "agesawrapper.h"
+
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/ioapic.h>
+#include <cpu/amd/amdfam14.h>
+#include <console/console.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <cpu/x86/msr.h>
-#include "agesawrapper.h"
-#include <cpu/amd/mtrr.h>
-#include <cpu/amd/amdfam14.h>
+#include <string.h>
#define DUMP_ACPI_TABLES 0
diff --git a/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c b/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c
index 0572335..250c581 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c
@@ -22,25 +22,19 @@
*-----------------------------------------------------------------------------
*/
-#include <stdint.h>
-#include <string.h>
#include "agesawrapper.h"
#include "BiosCallOuts.h"
-#include "cpuRegisters.h"
-#include "cpuCacheInit.h"
-#include "cpuApicUtilities.h"
-#include "cpuEarlyInit.h"
-#include "cpuLateInit.h"
-#include "Dispatcher.h"
-#include "cpuCacheInit.h"
-#include "heapManager.h"
-#include "amdlib.h"
#include "PlatformGnbPcieComplex.h"
-#include "Filecode.h"
+
+#include <arch/acpi.h>
#include <arch/io.h>
-#include <cpu/amd/agesa/s3_resume.h>
#include <cbmem.h>
-#include <arch/acpi.h>
+#include <cpu/x86/mtrr.h>
+#include <string.h>
+#include <stdint.h>
+
+#include <cpu/amd/agesa/s3_resume.h>
+#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#define FILECODE UNASSIGNED_FILE_FILECODE
diff --git a/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h b/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h
index ba47c53..6544d25 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h
+++ b/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h
@@ -26,8 +26,8 @@
#define _AGESAWRAPPER_H_
#include <stdint.h>
-#include "Porting.h"
-#include "AGESA.h"
+#include <vendorcode/amd/agesa/f14/AGESA.h>
+
/*----------------------------------------------------------------------------------------
* D E F I N I T I O N S A N D M A C R O S
diff --git a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
index c6383a2..ef408b2 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
@@ -33,7 +33,8 @@
* @e \$Revision: 23714 $ @e \$Date: 2009-12-09 17:28:37 -0600 (Wed, 09 Dec 2009) $
*/
-#include "Filecode.h"
+#include <vendorcode/amd/agesa/f14/AGESA.h>
+
#define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
diff --git a/src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c b/src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c
index 258d895..2c5d746 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c
@@ -17,14 +17,15 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include "agesawrapper.h"
+
#include <console/console.h>
+#include <cpu/amd/amdfam14.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <string.h>
#include <stdint.h>
#include <stdlib.h>
-#include <cpu/amd/amdfam14.h>
-#include "agesawrapper.h"
+#include <string.h>
#if CONFIG_AMD_SB_CIMX
#include <sb_cimx.h>
#endif
diff --git a/src/mainboard/jetway/nf81-t56n-lf/irq_tables.c b/src/mainboard/jetway/nf81-t56n-lf/irq_tables.c
index b9577cf..bcf87d9 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/irq_tables.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/irq_tables.c
@@ -18,12 +18,11 @@
*/
+#include <arch/pirq_routing.h>
+#include <cpu/amd/amdfam14.h>
#include <console/console.h>
-#include <device/pci.h>
#include <string.h>
#include <stdint.h>
-#include <arch/pirq_routing.h>
-#include <cpu/amd/amdfam14.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
diff --git a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
index 44f9c48..11249eb 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
@@ -17,17 +17,18 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include "BiosCallOuts.h"
+
+#include <arch/acpi.h>
+#include <arch/io.h>
#include <console/console.h>
+#include <cpu/x86/msr.h>
+#include <cpu/amd/agesa/s3_resume.h>
#include <device/device.h>
#include <device/pci.h>
-#include <arch/io.h>
-#include <cpu/x86/msr.h>
#include <device/pci_def.h>
+
#include <southbridge/amd/sb800/sb800.h>
-#include <arch/acpi.h>
-#include "BiosCallOuts.h"
-#include <cpu/amd/agesa/s3_resume.h>
-#include <cpu/amd/mtrr.h>
#include "SBPLATFORM.h"
void set_pcie_reset(void);
diff --git a/src/mainboard/jetway/nf81-t56n-lf/mptable.c b/src/mainboard/jetway/nf81-t56n-lf/mptable.c
index 6b8aaa6..05524aa 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/mptable.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/mptable.c
@@ -18,13 +18,14 @@
*/
-#include <console/console.h>
+#include <arch/io.h>
#include <arch/smp/mpspec.h>
+#include <console/console.h>
+#include <cpu/amd/amdfam14.h>
#include <device/pci.h>
-#include <arch/io.h>
-#include <string.h>
#include <stdint.h>
-#include <cpu/amd/amdfam14.h>
+#include <string.h>
+
#include <SBPLATFORM.h>
extern u8 bus_sb800[6];
diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
index 1214921..4b6669a 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
@@ -18,30 +18,32 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <stdint.h>
-#include <string.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
+#include "agesawrapper.h"
+
+#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/stages.h>
-#include <device/pnp_def.h>
-#include <arch/cpu.h>
-#include <cpu/x86/lapic.h>
+#include <cbmem.h>
#include <console/console.h>
+#include <cpu/amd/agesa/s3_resume.h>
+#include <cpu/x86/lapic.h>
+#include <cpu/x86/bist.h>
+
+#include <device/pci_def.h>
+#include <device/pci_ids.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "drivers/pc80/i8254.c"
+#include "drivers/pc80/i8259.c"
+
#include <console/loglevel.h>
#include <cpu/x86/mtrr.h>
-#include "agesawrapper.h"
-#include "cpu/x86/bist.h"
#include "superio/fintek/f71869ad/f71869ad.h"
-#include "cpu/x86/lapic.h"
-#include "drivers/pc80/i8254.c"
-#include "drivers/pc80/i8259.c"
#include <cpu/x86/cache.h>
#include <sb_cimx.h>
#include "SBPLATFORM.h"
-#include "cbmem.h"
#include "cpu/amd/mtrr.h"
-#include "cpu/amd/agesa/s3_resume.h"
void disable_cache_as_ram(void); /* cache_as_ram.inc */
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
More information about the coreboot-gerrit
mailing list