[coreboot-gerrit] Patch merged into coreboot/master: d75800c intel/bayleybay: Add Intel's Bayley Bay mainboard

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit d75800c7f2476bee243cc22255acb54d6676d4bc
Author: Martin Roth <gaumless at gmail.com>
Date:   Mon May 12 21:56:27 2014 -0600

    intel/bayleybay: Add Intel's Bayley Bay mainboard
    
    Bay Trail-I Platform – Bayley Bay-I Customer Reference Board
    
    The Bayley Bay CRB-I is a dual-channel DDR3L SO-DIMM non-ECC platform.
    It is designed to support the Bay Trail-I SoC.
    
    This implementation uses the Intel FSP (Vist the Intel FSP
    website for details on FSP architecture and support).
    This code does not currently support S3. All other features and IO
    ports are functional. Booted on Ubuntu 14.04, Mint 16,
    Fedora 20 with SeaBIOS payload. Memtest86, FWTS, and
    other tests pass.
    
    Notes:
    - Generates a 2MB binary to be flashed to the upper 2MB of the ROM,
    to preserve the existing Intel Flash Descriptor & TXE binary.
    - Tested with B0 & B3 Baytrail I parts
    
    Board support page will be updated on acceptance.
    
    Change-Id: I80c836c7590f2dc25ec854e7a0bb939024cea600
    Signed-off-by: Martin Roth <gaumless at gmail.com>
    Signed-off-by: Martin Roth <martin.roth at se-eng.com>
    Reviewed-on: http://review.coreboot.org/5792
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/5792 for details.

-gerrit